kernel/linux.git/drivers/gpu/drm/meson, branch v5.9.16

treewide: Use fallthrough pseudo-keyword

2020-08-23T22:36:59+00:00

Replace the existing /* fall through */ comments and its variants with the new pseudo-keyword macro fallthrough[1]. Also, remove unnecessary fall-through markings when it is the case. [1] https://www.kernel.org/doc/html/v5.7/process/deprecated.html?highlight=fallthrough#implicit-switch-case-fall-through Signed-off-by: Gustavo A. R. Silva

Merge v5.8-rc6 into drm-next

2020-07-23T22:48:05+00:00

I've got a silent conflict + two trees based on fixes to merge. Fixes a silent merge with amdgpu Signed-off-by: Dave Airlie

drm/meson: overlay: fix build failure

2020-07-07T13:53:44+00:00

The recent GCC compiler is very picky with the VD_H_START() and AFBC_DEC_PIXEL_BGN_H() macros, triggering a runtime assert error as: In function 'meson_overlay_setup_scaler_params', inlined from 'meson_overlay_atomic_update' at drivers/gpu/drm/meson/meson_overlay.c:542:2: ./include/linux/compiler.h:392:38: error: call to '__compiletime_assert_341' declared with attribute error: FIELD_PREP: value too large for the field drivers/gpu/drm/meson/meson_overlay.c:413:4: note: in expansion of macro 'AFBC_DEC_PIXEL_BGN_H' 413 | AFBC_DEC_PIXEL_BGN_H(hd_start_lines - afbc_left) | | ^~~~~~~~~~~~~~~~~~~~ ./include/linux/compiler.h:392:38: error: call to '__compiletime_assert_401' declared with attribute error: FIELD_PREP: value too large for the field It's not expected to overflow these fields, but the compiler did find a case where it overflows. We can safely ignore this, so mask the value with the field width. Fixes: e860785d57306 ("drm/meson: overlay: setup overlay for Amlogic FBC") Signed-off-by: Neil Armstrong Acked-by: Daniel Vetter [narmstrong: moved to (value) to avoid precedence issues] Link: https://patchwork.freedesktop.org/patch/msgid/20200707135009.32474-1-narmstrong@baylibre.com

drm/meson: crtc: handle commit of Amlogic FBC frames

2020-07-03T08:12:30+00:00

Since the VD1 Amlogic FBC decoder is now configured by the overlay driver, commit the right registers to decode the Amlogic FBC frame. Signed-off-by: Neil Armstrong Tested-by: Kevin Hilman Reviewed-by: Kevin Hilman Link: https://patchwork.freedesktop.org/patch/msgid/20200703080728.25207-7-narmstrong@baylibre.com

drm/meson: overlay: setup overlay for Amlogic FBC Scatter Memory layout

2020-07-03T08:12:30+00:00

Setup the Amlogic FBC decoder for the VD1 video overlay plane to use read the FBC header as Scatter Memory layout reference. Signed-off-by: Neil Armstrong Tested-by: Kevin Hilman Reviewed-by: Kevin Hilman Link: https://patchwork.freedesktop.org/patch/msgid/20200703080728.25207-6-narmstrong@baylibre.com

drm/meson: overlay: setup overlay for Amlogic FBC Memory Saving mode

2020-07-03T08:12:29+00:00

Setup the Amlogic FBC decoder for the VD1 video overlay plane to use a different superblock size for the Memory Saving mode. Signed-off-by: Neil Armstrong Tested-by: Kevin Hilman Reviewed-by: Kevin Hilman Link: https://patchwork.freedesktop.org/patch/msgid/20200703080728.25207-5-narmstrong@baylibre.com

drm/meson: overlay: setup overlay for Amlogic FBC

2020-07-03T08:12:29+00:00

Setup the Amlogic FBC decoder for the VD1 video overlay plane. The VD1 Amlogic FBC decoder is integrated in the pipeline like the YUV pixel reading/formatter but used a direct memory address instead. This adds support for the basic layout, and needs to calculate the content body size since the header is allocated after. Signed-off-by: Neil Armstrong Tested-by: Kevin Hilman Reviewed-by: Kevin Hilman Link: https://patchwork.freedesktop.org/patch/msgid/20200703080728.25207-4-narmstrong@baylibre.com

drm/meson: add Amlogic Video FBC registers

2020-07-03T08:12:28+00:00

Add the registers of the VPU VD1 Amlogic FBC decoder module, and routing register. Signed-off-by: Neil Armstrong Tested-by: Kevin Hilman Reviewed-by: Kevin Hilman Link: https://patchwork.freedesktop.org/patch/msgid/20200703080728.25207-3-narmstrong@baylibre.com

drm/meson: viu: fix setting the OSD burst length in VIU_OSD1_FIFO_CTRL_STAT

2020-07-02T08:36:56+00:00

The burst length is configured in VIU_OSD1_FIFO_CTRL_STAT[31] and VIU_OSD1_FIFO_CTRL_STAT[11:10]. The public S905D3 datasheet describes this as: - 0x0 = up to 24 per burst - 0x1 = up to 32 per burst - 0x2 = up to 48 per burst - 0x3 = up to 64 per burst - 0x4 = up to 96 per burst - 0x5 = up to 128 per burst The lower two bits map to VIU_OSD1_FIFO_CTRL_STAT[11:10] while the upper bit maps to VIU_OSD1_FIFO_CTRL_STAT[31]. Replace meson_viu_osd_burst_length_reg() with pre-defined macros which set these values. meson_viu_osd_burst_length_reg() always returned 0 (for the two used values: 32 and 64 at least) and thus incorrectly set the burst size to 24. Fixes: 147ae1cbaa1842 ("drm: meson: viu: use proper macros instead of magic constants") Signed-off-by: Martin Blumenstingl Signed-off-by: Neil Armstrong Reviewed-by: Neil Armstrong Tested-by: Christian Hewitt Link: https://patchwork.freedesktop.org/patch/msgid/20200620155752.21065-1-martin.blumenstingl@googlemail.com

Backmerge remote-tracking branch 'drm/drm-next' into drm-misc-next

2020-06-29T10:16:26+00:00

Some conflicts with ttm_bo->offset removal, but drm-misc-next needs updating to v5.8. Signed-off-by: Maarten Lankhorst