<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpu/drm/i915/intel_ringbuffer.c, branch v4.4.171</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v4.4.171</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v4.4.171'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2016-05-04T21:48:47+00:00</updated>
<entry>
<title>drm/i915: Fixup the free space logic in ring_prepare</title>
<updated>2016-05-04T21:48:47+00:00</updated>
<author>
<name>Akash Goel</name>
<email>akash.goel@intel.com</email>
</author>
<published>2016-03-11T09:26:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=e0a2d244dcb6068887ef7d3c3af302fe9152298f'/>
<id>urn:sha1:e0a2d244dcb6068887ef7d3c3af302fe9152298f</id>
<content type='text'>
commit d43f3ebf12f59c57782ec652da65ef61c2662b40 upstream.

Currently for the case where there is enough space at the end of Ring
buffer for accommodating only the base request, the wrapround is done
immediately and as a result the base request gets added at the start
of Ring buffer. But there may not be enough free space at the beginning
to accommodate the base request, as before the wraparound, the wait was
effectively done for the reserved_size free space from the start of
Ring buffer. In such a case there is a potential of Ring buffer overflow,
the instructions at the head of Ring (ACTHD) can get overwritten.

Since the base request can fit in the remaining space, there is no need
to wraparound immediately. The wraparound will anyway happen later when
the reserved part starts getting used.

Cc: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Signed-off-by: Akash Goel &lt;akash.goel@intel.com&gt;
Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/1457688402-10411-1-git-send-email-akash.goel@intel.com
Reviewed-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
(cherry picked from commit 782f6bc0aba037436d6a04d19b23f8b61020a576)
Signed-off-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>drm/i915: Cleanup phys status page too</title>
<updated>2016-05-04T21:48:47+00:00</updated>
<author>
<name>Ville Syrjälä</name>
<email>ville.syrjala@linux.intel.com</email>
</author>
<published>2016-01-11T18:48:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=39fa719753bcef274084502c1ec8cfefc556209f'/>
<id>urn:sha1:39fa719753bcef274084502c1ec8cfefc556209f</id>
<content type='text'>
commit 7d3fdfff23852fe458a0d0979a3555fe60f1e563 upstream.

Restore the lost phys status page cleanup.

Fixes the following splat with DMA_API_DEBUG=y:

WARNING: CPU: 0 PID: 21615 at ../lib/dma-debug.c:974 dma_debug_device_change+0x190/0x1f0()
pci 0000:00:02.0: DMA-API: device driver has pending DMA allocations while released from device [count=1]
               One of leaked entries details: [device address=0x0000000023163000] [size=4096 bytes] [mapped with DMA_BIDIRECTIONAL] [mapped as coherent]
Modules linked in: i915(-) i2c_algo_bit drm_kms_helper syscopyarea sysfillrect sysimgblt fb_sys_fops drm sha256_generic hmac drbg ctr ccm sch_fq_codel binfmt_misc joydev mousedev arc4 ath5k iTCO_wdt mac80211 smsc_ircc2 ath snd_intel8x0m snd_intel8x0 snd_ac97_codec ac97_bus psmouse snd_pcm input_leds i2c_i801 pcspkr snd_timer cfg80211 snd soundcore i2c_core ehci_pci firewire_ohci ehci_hcd firewire_core lpc_ich 8139too rfkill crc_itu_t mfd_core mii usbcore rng_core intel_agp intel_gtt usb_common agpgart irda crc_ccitt fujitsu_laptop led_class parport_pc video parport evdev backlight
CPU: 0 PID: 21615 Comm: rmmod Tainted: G     U          4.4.0-rc4-mgm-ovl+ #4
Hardware name: FUJITSU SIEMENS LIFEBOOK S6120/FJNB16C, BIOS Version 1.26  05/10/2004
 e31a3de0 e31a3de0 e31a3d9c c128d4bd e31a3dd0 c1045a0c c15e00c4 e31a3dfc
 0000546f c15dfad2 000003ce c12b3740 000003ce c12b3740 00000000 00000001
 f61fb8a0 e31a3de8 c1045a83 00000009 e31a3de0 c15e00c4 e31a3dfc e31a3e4c
Call Trace:
 [&lt;c128d4bd&gt;] dump_stack+0x16/0x19
 [&lt;c1045a0c&gt;] warn_slowpath_common+0x8c/0xd0
 [&lt;c12b3740&gt;] ? dma_debug_device_change+0x190/0x1f0
 [&lt;c12b3740&gt;] ? dma_debug_device_change+0x190/0x1f0
 [&lt;c1045a83&gt;] warn_slowpath_fmt+0x33/0x40
 [&lt;c12b3740&gt;] dma_debug_device_change+0x190/0x1f0
 [&lt;c1065499&gt;] notifier_call_chain+0x59/0x70
 [&lt;c10655af&gt;] __blocking_notifier_call_chain+0x3f/0x80
 [&lt;c106560f&gt;] blocking_notifier_call_chain+0x1f/0x30
 [&lt;c134cfb3&gt;] __device_release_driver+0xc3/0xf0
 [&lt;c134d0d7&gt;] driver_detach+0x97/0xa0
 [&lt;c134c440&gt;] bus_remove_driver+0x40/0x90
 [&lt;c134db18&gt;] driver_unregister+0x28/0x60
 [&lt;c1079e8c&gt;] ? trace_hardirqs_on_caller+0x12c/0x1d0
 [&lt;c12c0618&gt;] pci_unregister_driver+0x18/0x80
 [&lt;f83e96e7&gt;] drm_pci_exit+0x87/0xb0 [drm]
 [&lt;f8b3be2d&gt;] i915_exit+0x1b/0x1ee [i915]
 [&lt;c10b999c&gt;] SyS_delete_module+0x14c/0x210
 [&lt;c1079e8c&gt;] ? trace_hardirqs_on_caller+0x12c/0x1d0
 [&lt;c115a9bd&gt;] ? ____fput+0xd/0x10
 [&lt;c1002014&gt;] do_fast_syscall_32+0xa4/0x450
 [&lt;c149f6fa&gt;] sysenter_past_esp+0x3b/0x5d
---[ end trace c2ecbc77760f10a0 ]---
Mapped at:
 [&lt;c12b3183&gt;] debug_dma_alloc_coherent+0x33/0x90
 [&lt;f83e989c&gt;] drm_pci_alloc+0x18c/0x1e0 [drm]
 [&lt;f8acd59f&gt;] intel_init_ring_buffer+0x2af/0x490 [i915]
 [&lt;f8acd8b0&gt;] intel_init_render_ring_buffer+0x130/0x750 [i915]
 [&lt;f8aaea4e&gt;] i915_gem_init_rings+0x1e/0x110 [i915]

v2: s/BUG_ON/WARN_ON/ since dim doens't like the former anymore

Cc: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Fixes: 5c6c600 ("drm/i915: Remove DRI1 ring accessors and API")
Signed-off-by: Ville Syrjälä &lt;ville.syrjala@linux.intel.com&gt;
Reviewed-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt; (v1)
Link: http://patchwork.freedesktop.org/patch/msgid/1452538112-5331-1-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>drm/i915: Make sure DC writes are coherent on flush.</title>
<updated>2016-03-03T23:07:22+00:00</updated>
<author>
<name>Francisco Jerez</name>
<email>currojerez@riseup.net</email>
</author>
<published>2016-01-14T02:59:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=f39741673c3d54bc84ec30b4e1d21daa75bbcb02'/>
<id>urn:sha1:f39741673c3d54bc84ec30b4e1d21daa75bbcb02</id>
<content type='text'>
commit 935a0ff0e1ea62a116848c0a187b13838f7b9cee upstream.

We need to set the DC FLUSH PIPE_CONTROL bit on Gen7+ to guarantee
that writes performed via the HDC are visible in memory.  Fixes an
intermittent failure in a Piglit test that writes to a BO from a
shader using GL atomic counters (implemented as HDC untyped atomics)
and then expects the memory to read back the same value after mapping
it on the CPU.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91298
Tested-by: Mark Janes &lt;mark.a.janes@intel.com&gt;
Cc: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
Signed-off-by: Francisco Jerez &lt;currojerez@riseup.net&gt;
Reviewed-by: Ville Syrjälä &lt;ville.syrjala@linux.intel.com&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/1452740379-3194-1-git-send-email-currojerez@riseup.net
(cherry picked from commit 965fd602a6436f689f4f2fe40a6789582778ccd5)
Signed-off-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux</title>
<updated>2015-11-10T17:33:06+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-11-10T17:33:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=3e82806b97398d542a5e03bd94861f79ce10ecee'/>
<id>urn:sha1:3e82806b97398d542a5e03bd94861f79ce10ecee</id>
<content type='text'>
Pull drm updates from Dave Airlie:
 "I Was Almost Tempted To Capitalise Every Word, but then I decided I
  couldn't read it myself!

  I've also got one pull request for the sti driver outstanding.  It
  relied on a commit in Greg's tree and I didn't find out in time, that
  commit is in your tree now so I might send that along once this is
  merged.

  I also had the accidental misfortune to have access to a Skylake on my
  desk for a few days, and I've had to encourage Intel to try harder,
  which seems to be happening now.

  Here is the main drm-next pull request for 4.4.

  Highlights:

  New driver:
        vc4 driver for the Rasberry Pi VPU.
        (From Eric Anholt at Broadcom.)

  Core:
        Atomic fbdev support
        Atomic helpers for runtime pm
        dp/aux i2c STATUS_UPDATE handling
        struct_mutex usage cleanups.
        Generic of probing support.

  Documentation:
        Kerneldoc for VGA switcheroo code.
        Rename to gpu instead of drm to reflect scope.

  i915:
        Skylake GuC firmware fixes
        HPD A support
        VBT backlight fallbacks
        Fastboot by default for some systems
        FBC work
        BXT/SKL workarounds
        Skylake deeper sleep state fixes

  amdgpu:
        Enable GPU scheduler by default
        New atombios opcodes
        GPUVM debugging options
        Stoney support.
        Fencing cleanups.

  radeon:
        More efficient CS checking

  nouveau:
        gk20a instance memory handling improvements.
        Improved PGOB detection and GK107 support
        Kepler GDDR5 PLL statbility improvement
        G8x/GT2xx reclock improvements
        new userspace API compatiblity fixes.

  virtio-gpu:
        Add 3D support - qemu 2.5 has it merged for it's gtk backend.

  msm:
        Initial msm88896 (snapdragon 8200)

  exynos:
        HDMI cleanups
        Enable mixer driver byt default
        Add DECON-TV support

  vmwgfx:
        Move to using memremap + fixes.

  rcar-du:
        Add support for R8A7793/4 DU

  armada:
        Remove support for non-component mode
        Improved plane handling
        Power savings while in DPMS off.

  tda998x:
        Remove unused slave encoder support
        Use more HDMI helpers
        Fix EDID read handling

  dwhdmi:
        Interlace video mode support for ipu-v3/dw_hdmi
        Hotplug state fixes
        Audio driver integration

  imx:
        More color formats support.

  tegra:
        Minor fixes/improvements"

[ Merge fixup: remove unused variable 'dev' that had all uses removed in
  commit 4e270f088011: "drm/gem: Drop struct_mutex requirement from
  drm_gem_mmap_obj" ]

* 'drm-next' of git://people.freedesktop.org/~airlied/linux: (764 commits)
  drm/vmwgfx: Relax irq locking somewhat
  drm/vmwgfx: Properly flush cursor updates and page-flips
  drm/i915/skl: disable display side power well support for now
  drm/i915: Extend DSL readout fix to BDW and SKL.
  drm/i915: Do graphics device reset under forcewake
  drm/i915: Skip fence installation for objects with rotated views (v4)
  vga_switcheroo: Drop client power state VGA_SWITCHEROO_INIT
  drm/amdgpu: group together common fence implementation
  drm/amdgpu: remove AMDGPU_FENCE_OWNER_MOVE
  drm/amdgpu: remove now unused fence functions
  drm/amdgpu: fix fence fallback check
  drm/amdgpu: fix stoping the scheduler timeout
  drm/amdgpu: cleanup on error in amdgpu_cs_ioctl()
  drm/i915: Fix locking around GuC firmware load
  drm/amdgpu: update Fiji's Golden setting
  drm/amdgpu: update Fiji's rev id
  drm/amdgpu: extract common code in vi_common_early_init
  drm/amd/scheduler: don't oops on failure to load
  drm/amdgpu: don't oops on failure to load (v2)
  drm/amdgpu: don't VT switch on suspend
  ...
</content>
</entry>
<entry>
<title>drm/i915: Move skl/bxt gt specific workarounds to ring init</title>
<updated>2015-10-13T15:41:57+00:00</updated>
<author>
<name>Mika Kuoppala</name>
<email>mika.kuoppala@linux.intel.com</email>
</author>
<published>2015-10-12T10:20:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=9c4cbf8212e8d8be4bc6e16cc2c21af2bbaab2c1'/>
<id>urn:sha1:9c4cbf8212e8d8be4bc6e16cc2c21af2bbaab2c1</id>
<content type='text'>
Some registers are, naturally, lost in gpu reset/suspend cycle.
And some registers, for example in display domain, are not subject
to gpu reset so they retain their contents.

As hang recovery triggers a reset, recoverable gpu hang can currently
flush out essential workarounds and cause havoc later on.

When register GEN8_GARBNTL is missing the WaEnableGapsTsvCreditFix:skl,
it can cause random system hangs [1]. This workaround was added in:
commit 245d96670d26 ("drm/i915:skl: Add WaEnableGapsTsvCreditFix")
But another set of system hangs were observed and the failure pattern
indicated that there was random gpu hang preceding the system hang [2].
This lead to the realization that we lose this workaround and BDW_SCRATCH1
on reset.

Add these workarounds setup in display init to skl/bxt ring init
where LRI workarounds are also setup. This way their setup is not
dependent on display side init.

References: [1] https://bugs.freedesktop.org/show_bug.cgi?id=90854
References: [2] https://bugs.freedesktop.org/show_bug.cgi?id=92315
Reported-by: Tomi Sarvela &lt;tomix.p.sarvela@intel.com&gt;
Cc: Tomi Sarvela &lt;tomix.p.sarvela@intel.com&gt;
Cc: Ville Syrjälä &lt;ville.syrjala@linux.intel.com&gt;
Signed-off-by: Mika Kuoppala &lt;mika.kuoppala@intel.com&gt;
Reviewed-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Tested-by: Tomi Sarvela &lt;tomix.p.sarvela@intel.com&gt;
Signed-off-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
</content>
</entry>
<entry>
<title>drm/i915: Flush pipecontrol post-sync writes</title>
<updated>2015-10-13T13:54:19+00:00</updated>
<author>
<name>Chris Wilson</name>
<email>chris@chris-wilson.co.uk</email>
</author>
<published>2015-08-21T15:08:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=40a24488f5250d63341e74b9994159afc4589606'/>
<id>urn:sha1:40a24488f5250d63341e74b9994159afc4589606</id>
<content type='text'>
In order to flush the results from in-batch pipecontrol writes (used for
example in glQuery) before declaring the batch complete (and so declaring
the query results coherent), we need to set the FlushEnable bit in our
flushing pipecontrol. The FlushEnable bit "waits until all previous
writes of immediate data from post-sync circles are complete before
executing the next command".

I get GPU hangs on byt without flushing these writes (running ue4).
piglit has examples where the flush is required for correct rendering.

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Reviewed-by: Ville Syrjälä &lt;ville.syrjala@linux.intel.com&gt;
Acked-by: Daniel Vetter &lt;daniel@ffwll.ch&gt;
Cc: stable@vger.kernel.org
Signed-off-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/i915: Hook up ring workaround writes at context creation time on Gen6-7.</title>
<updated>2015-10-07T14:37:48+00:00</updated>
<author>
<name>Francisco Jerez</name>
<email>currojerez@riseup.net</email>
</author>
<published>2015-10-07T11:44:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=4f91fc6d2c1d98b3da7a8341ef5ec66ccf2916b9'/>
<id>urn:sha1:4f91fc6d2c1d98b3da7a8341ef5ec66ccf2916b9</id>
<content type='text'>
intel_rcs_ctx_init() emits all workaround register writes on the list
to the ring, in addition to calling i915_gem_render_state_init().  The
workaround list is currently empty on Gen6-7 so this shouldn't cause
any functional changes.

Signed-off-by: Francisco Jerez &lt;currojerez@riseup.net&gt;
Signed-off-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
</content>
</entry>
<entry>
<title>drm/i915: Don't warn if the workaround list is empty.</title>
<updated>2015-10-07T14:37:03+00:00</updated>
<author>
<name>Francisco Jerez</name>
<email>currojerez@riseup.net</email>
</author>
<published>2015-10-07T11:44:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=02235808b61cd9382d224b0df263193006dd9913'/>
<id>urn:sha1:02235808b61cd9382d224b0df263193006dd9913</id>
<content type='text'>
It's not an error for the workaround list to be empty if no
workarounds are needed.  This will avoid spamming the logs
unnecessarily on Gen6 after the workaround list is hooked up on
pre-Gen8 hardware by the following commits.

Signed-off-by: Francisco Jerez &lt;currojerez@riseup.net&gt;
Signed-off-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
</content>
</entry>
<entry>
<title>drm/i915: Resurrect golden context on gen6/7</title>
<updated>2015-10-07T14:35:49+00:00</updated>
<author>
<name>Daniel Vetter</name>
<email>daniel.vetter@ffwll.ch</email>
</author>
<published>2015-10-01T16:06:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6a8aadc43974729349cb6b823d774c091afd78cd'/>
<id>urn:sha1:6a8aadc43974729349cb6b823d774c091afd78cd</id>
<content type='text'>
In

commit 8f0e2b9d95a88ca5d8349deef2375644faf184ae
Author: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Date:   Tue Dec 2 16:19:07 2014 +0100

    drm/i915: Move golden context init into -&gt;init_context

I've shuffled around per-ctx init code a bit for legacy contexts but
accidentally dropped the render state init call on gen6/7. Resurrect
it.

Reported-by: Francisco Jerez &lt;currojerez@riseup.net&gt;
Cc: Francisco Jerez &lt;currojerez@riseup.net&gt;
Cc: Dave Gordon &lt;david.s.gordon@intel.com&gt;
Cc: Thomas Daniel &lt;thomas.daniel@intel.com&gt;
Signed-off-by: Daniel Vetter &lt;daniel.vetter@intel.com&gt;
Reviewed-by: Francisco Jerez &lt;currojerez@riseup.net&gt;
Signed-off-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
</content>
</entry>
<entry>
<title>drm/i915/gen8: Move WaHdcDisableFetchWhenMasked to common init fn</title>
<updated>2015-09-30T08:20:34+00:00</updated>
<author>
<name>Arun Siluvery</name>
<email>arun.siluvery@linux.intel.com</email>
</author>
<published>2015-09-25T16:40:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=120f5d28714b5c401179a1fd6010c86b13d912ff'/>
<id>urn:sha1:120f5d28714b5c401179a1fd6010c86b13d912ff</id>
<content type='text'>
Signed-off-by: Arun Siluvery &lt;arun.siluvery@linux.intel.com&gt;
Reviewed-by: Ville Syrjälä &lt;ville.syrjala@linux.intel.com&gt;
Signed-off-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
</content>
</entry>
</feed>
