<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpu/drm/i915/intel_frontbuffer.c, branch v4.4.171</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v4.4.171</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v4.4.171'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2015-08-05T07:59:44+00:00</updated>
<entry>
<title>drm/i915: fix FBC frontbuffer tracking flushing code</title>
<updated>2015-08-05T07:59:44+00:00</updated>
<author>
<name>Paulo Zanoni</name>
<email>paulo.r.zanoni@intel.com</email>
</author>
<published>2015-07-14T19:29:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6f4551fe8e7f3561b97b7f74d8f4af08db01de6f'/>
<id>urn:sha1:6f4551fe8e7f3561b97b7f74d8f4af08db01de6f</id>
<content type='text'>
Due to the way busy_bits was handled, we were not doing any flushes if
we didn't previously get an invalidate. Since it's possible to get
flushes without an invalidate first, remove the busy_bits early
return.

So now that we don't have the busy_bits guard anymore we'll need the
origin check for the GTT tracking (we were not doing anything on GTT
flushes due to the GTT check at invalidate()).

As a last detail, since we can get multiple consecutive flushes,
disable FBC before updating it, otherwise intel_fbc_update() will just
keep FBC enabled instead of restarting it.

Notice that this does not fix any of the current IGT tests due to the
fact that we still have a few intel_fbc() calls at points where we
also have the frontbuffer tracking calls: we didn't fully convert to
frontbuffer tracking yet. Once we remove those calls and start relying
only on the frontbuffer tracking infrastructure we'll need this patch.

Signed-off-by: Paulo Zanoni &lt;paulo.r.zanoni@intel.com&gt;
Reviewed-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
Signed-off-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
</content>
</entry>
<entry>
<title>drm/i915: fix intel_frontbuffer_flip documentation</title>
<updated>2015-07-09T17:17:53+00:00</updated>
<author>
<name>Paulo Zanoni</name>
<email>paulo.r.zanoni@intel.com</email>
</author>
<published>2015-07-08T21:08:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=cc2e26a7c57924b31e9c5ac7b3d0d814253c9285'/>
<id>urn:sha1:cc2e26a7c57924b31e9c5ac7b3d0d814253c9285</id>
<content type='text'>
Reported by the kbuild test robot.

Regression introduced by:
commit fdbff9282c0f5f61ffc87d57461b04d943250910
Author: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Date:   Thu Jun 18 11:23:24 2015 +0200
    drm/i915: Clear fb_tracking.busy_bits also for synchronous flips

(I reviewed this commit, so it's also my fault)

Signed-off-by: Paulo Zanoni &lt;paulo.r.zanoni@intel.com&gt;
Signed-off-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
</content>
</entry>
<entry>
<title>drm/i915: intel_frontbuffer_flush can now be static</title>
<updated>2015-07-09T17:17:48+00:00</updated>
<author>
<name>Paulo Zanoni</name>
<email>paulo.r.zanoni@intel.com</email>
</author>
<published>2015-07-08T21:08:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=b6c2aa5187ac59c8c6728ae09934390c3757f2bf'/>
<id>urn:sha1:b6c2aa5187ac59c8c6728ae09934390c3757f2bf</id>
<content type='text'>
So make it static.

Signed-off-by: Paulo Zanoni &lt;paulo.r.zanoni@intel.com&gt;
Signed-off-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
</content>
</entry>
<entry>
<title>drm/i915: fix intel_fb_obj_flush documentation</title>
<updated>2015-07-09T17:16:28+00:00</updated>
<author>
<name>Paulo Zanoni</name>
<email>paulo.r.zanoni@intel.com</email>
</author>
<published>2015-07-08T21:08:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=76f2e13d5597d72c4f88509d0d183e4a8512b01f'/>
<id>urn:sha1:76f2e13d5597d72c4f88509d0d183e4a8512b01f</id>
<content type='text'>
Reported by the kbuild test robot.

Regression introduced by:
commit de152b627eb3018de91ec5c5a50b38e17d80a88b
Author: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
Date:   Tue Jul 7 16:28:51 2015 -0700
    drm/i915: Add origin to frontbuffer tracking flush

(I reviewed this commit, so it's also my fault)

Signed-off-by: Paulo Zanoni &lt;paulo.r.zanoni@intel.com&gt;
Reviewed-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
Signed-off-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
</content>
</entry>
<entry>
<title>drm/i915: PSR: Flush means invalidate + flush</title>
<updated>2015-07-09T14:35:35+00:00</updated>
<author>
<name>Rodrigo Vivi</name>
<email>rodrigo.vivi@intel.com</email>
</author>
<published>2015-07-08T23:21:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=169de1316c1e69ad169d81c60549479640461630'/>
<id>urn:sha1:169de1316c1e69ad169d81c60549479640461630</id>
<content type='text'>
Since flush actually means invalidate + flush we need to force psr
exit on PSR flush.

On Core platforms there is no way to disable hw tracking and
do the pure sw tracking so we simulate it by fully disable psr and
reschedule a enable back.
So a good idea is to minimize sequential disable/enable in cases we
know that HW tracking like when flush has been originated by a flip.
Also flip had just invalidated it already.

It also uses origin to minimize the a bit the amount of
disable/enabled, mainly when flip already had invalidated.

With this patch in place it is possible to do a flush on dirty areas
properly in a following patch.

v2: Remove duplicated exit on HSW+Sprites as pointed out by Paulo.

Cc: Paulo Zanoni &lt;paulo.r.zanoni@intel.com&gt;
Cc: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Signed-off-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
Reviewed-by: Paulo Zanoni &lt;paulo.r.zanoni@intel.com&gt;
Signed-off-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
</content>
</entry>
<entry>
<title>drm/i915: Add origin to frontbuffer tracking flush</title>
<updated>2015-07-08T15:29:08+00:00</updated>
<author>
<name>Rodrigo Vivi</name>
<email>rodrigo.vivi@intel.com</email>
</author>
<published>2015-07-07T23:28:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=de152b627eb3018de91ec5c5a50b38e17d80a88b'/>
<id>urn:sha1:de152b627eb3018de91ec5c5a50b38e17d80a88b</id>
<content type='text'>
This will be useful to PSR and FBC once we start making
dirty fb calls to also flush frontbuffer.

Cc: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Cc: Paulo Zanoni &lt;paulo.r.zanoni@intel.com&gt;
Signed-off-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
Reviewed-by: Paulo Zanoni &lt;paulo.r.zanoni@intel.com&gt;
Signed-off-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
</content>
</entry>
<entry>
<title>drm/i915: Nuke lvds downclock support</title>
<updated>2015-06-24T08:27:26+00:00</updated>
<author>
<name>Daniel Vetter</name>
<email>daniel.vetter@ffwll.ch</email>
</author>
<published>2015-06-18T08:30:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c329a4ec595e886300710271db24bc29b74a4205'/>
<id>urn:sha1:c329a4ec595e886300710271db24bc29b74a4205</id>
<content type='text'>
With the new DRRS code it kinda sticks out, and we never managed to
get this to work well enough without causing issues. Time to wave
goodbye.

I've decided to keep the logic for programming the reduced clocks
intact, but everything else is gone. If anyone ever wants to resurrect
this we need to redo it all anyway on top of the frontbuffer tracking.

Signed-off-by: Daniel Vetter &lt;daniel.vetter@intel.com&gt;
Acked-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Signed-off-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
</content>
</entry>
<entry>
<title>drm/i915: Use to_i915 in intel_frontbuffer.c</title>
<updated>2015-06-23T22:22:38+00:00</updated>
<author>
<name>Daniel Vetter</name>
<email>daniel.vetter@ffwll.ch</email>
</author>
<published>2015-06-18T08:30:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=9fb73863cc3eda7476e88a03e8b125b3d309b7b3'/>
<id>urn:sha1:9fb73863cc3eda7476e88a03e8b125b3d309b7b3</id>
<content type='text'>
Must have missed the transition.

Reviewed-by: Paulo Zanoni &lt;paulo.r.zanoni@intel.com&gt;
Signed-off-by: Daniel Vetter &lt;daniel.vetter@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/i915/psr: Restrict single-shot updates to the PSR pipe</title>
<updated>2015-06-23T22:22:37+00:00</updated>
<author>
<name>Daniel Vetter</name>
<email>daniel.vetter@ffwll.ch</email>
</author>
<published>2015-06-18T08:30:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=20c8838b0e3ba408a0ffe185b6124cdd0fcc3283'/>
<id>urn:sha1:20c8838b0e3ba408a0ffe185b6124cdd0fcc3283</id>
<content type='text'>
The frontbuffer code gives us accurate information about activity,
let's use it. Again this should avoid unecessary updates when multiple
screens are on.

Also realign function paramaters, I couldn't resist that bit of OCD.

Cc: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
Cc: Durgadoss R &lt;durgadoss.r@intel.com&gt;
Reviewed-by: Paulo Zanoni &lt;paulo.r.zanoni@intel.com&gt;
Signed-off-by: Daniel Vetter &lt;daniel.vetter@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/i915: Filter out no-op frontbuffer tracking flushes</title>
<updated>2015-06-23T22:22:35+00:00</updated>
<author>
<name>Daniel Vetter</name>
<email>daniel.vetter@ffwll.ch</email>
</author>
<published>2015-06-18T08:30:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=27e78a2a1f92e79707b4fb18cff1276088ef9178'/>
<id>urn:sha1:27e78a2a1f92e79707b4fb18cff1276088ef9178</id>
<content type='text'>
Paulo noticed that the fbc frontbuffer tracking flush callback
occasionally gets a call without any bit set. This can happen when we
have to filter flush calls due to e.g. gpu rendering. Filter these
out.

Reported-by: Paulo Zanoni &lt;przanoni@gmail.com&gt;
Cc: Paulo Zanoni &lt;przanoni@gmail.com&gt;
Reviewed-by: Paulo Zanoni &lt;paulo.r.zanoni@intel.com&gt;
Signed-off-by: Daniel Vetter &lt;daniel.vetter@intel.com&gt;
</content>
</entry>
</feed>
