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<title>kernel/linux.git/drivers/gpu/drm/etnaviv, branch v6.12.80</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.12.80</id>
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<updated>2025-11-13T20:33:58+00:00</updated>
<entry>
<title>drm/etnaviv: fix flush sequence logic</title>
<updated>2025-11-13T20:33:58+00:00</updated>
<author>
<name>Tomeu Vizoso</name>
<email>tomeu@tomeuvizoso.net</email>
</author>
<published>2025-10-21T09:37:23+00:00</published>
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<id>urn:sha1:8fe83fad4bb66e8909f03ef41e9dd9ba85c20774</id>
<content type='text'>
[ Upstream commit a042beac6e6f8ac1e923784cfff98b47cbabb185 ]

The current logic uses the flush sequence from the current address
space. This is harmless when deducing the flush requirements for the
current submit, as either the incoming address space is the same one
as the currently active one or we switch context, in which case the
flush is unconditional.

However, this sequence is also stored as the current flush sequence
of the GPU. If we switch context the stored flush sequence will no
longer belong to the currently active address space. This incoherency
can then cause missed flushes, resulting in translation errors.

Fixes: 27b67278e007 ("drm/etnaviv: rework MMU handling")
Signed-off-by: Tomeu Vizoso &lt;tomeu@tomeuvizoso.net&gt;
Signed-off-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Reviewed-by: Christian Gmeiner &lt;cgmeiner@igalia.com&gt;
Link: https://lore.kernel.org/r/20251021093723.3887980-1-l.stach@pengutronix.de
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/etnaviv: Protect the scheduler's pending list with its lock</title>
<updated>2025-07-06T09:01:44+00:00</updated>
<author>
<name>Maíra Canal</name>
<email>mcanal@igalia.com</email>
</author>
<published>2025-06-02T13:22:16+00:00</published>
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<id>urn:sha1:b464edc12d5bd4347b0c9866d32e3594fa8ad4be</id>
<content type='text'>
commit 61ee19dedb8d753249e20308782bf4e9e2fb7344 upstream.

Commit 704d3d60fec4 ("drm/etnaviv: don't block scheduler when GPU is still
active") ensured that active jobs are returned to the pending list when
extending the timeout. However, it didn't use the pending list's lock to
manipulate the list, which causes a race condition as the scheduler's
workqueues are running.

Hold the lock while manipulating the scheduler's pending list to prevent
a race.

Cc: stable@vger.kernel.org
Fixes: 704d3d60fec4 ("drm/etnaviv: don't block scheduler when GPU is still active")
Reported-by: Philipp Stanner &lt;phasta@kernel.org&gt;
Closes: https://lore.kernel.org/dri-devel/964e59ba1539083ef29b06d3c78f5e2e9b138ab8.camel@mailbox.org/
Reviewed-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Reviewed-by: Philipp Stanner &lt;phasta@kernel.org&gt;
Link: https://lore.kernel.org/r/20250602132240.93314-1-mcanal@igalia.com
Signed-off-by: Maíra Canal &lt;mcanal@igalia.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drm/etnaviv: Fix page property being used for non writecombine buffers</title>
<updated>2025-02-08T08:56:55+00:00</updated>
<author>
<name>Sui Jingfeng</name>
<email>sui.jingfeng@linux.dev</email>
</author>
<published>2024-11-04T00:41:56+00:00</published>
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<id>urn:sha1:cb52be07651b884d2d8856d610758ebeead5d9fd</id>
<content type='text'>
[ Upstream commit 834f304192834d6f0941954f3277ae0ba11a9a86 ]

In the etnaviv_gem_vmap_impl() function, the driver vmap whatever buffers
with write combine(WC) page property, this is incorrect. Cached buffers
should be mapped with the cached page property and uncached buffers should
be mapped with the uncached page property.

Fixes: a0a5ab3e99b8 ("drm/etnaviv: call correct function when trying to vmap a DMABUF")
Signed-off-by: Sui Jingfeng &lt;sui.jingfeng@linux.dev&gt;
Signed-off-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/etnaviv: flush shader L1 cache after user commandstream</title>
<updated>2024-12-09T09:41:13+00:00</updated>
<author>
<name>Lucas Stach</name>
<email>l.stach@pengutronix.de</email>
</author>
<published>2024-10-25T15:14:46+00:00</published>
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<id>urn:sha1:96c308559eedcea0563c98fae4d3fee9d84b6b8d</id>
<content type='text'>
commit 4f8dbadef085ab447a01a8d4806a3f629fea05ed upstream.

The shader L1 cache is a writeback cache for shader loads/stores
and thus must be flushed before any BOs backing the shader buffers
are potentially freed.

Cc: stable@vger.kernel.org
Reviewed-by: Christian Gmeiner &lt;cgmeiner@igalia.com&gt;
Signed-off-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drm/etnaviv: hold GPU lock across perfmon sampling</title>
<updated>2024-12-05T13:01:50+00:00</updated>
<author>
<name>Lucas Stach</name>
<email>l.stach@pengutronix.de</email>
</author>
<published>2024-07-05T20:00:09+00:00</published>
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<id>urn:sha1:581e5313b6d847324ddf49c5faef077c4aa32d0b</id>
<content type='text'>
[ Upstream commit 37dc4737447a7667f8e9ec790dac251da057eb27 ]

The perfmon sampling mutates shared GPU state (e.g. VIVS_HI_CLOCK_CONTROL
to select the pipe for the perf counter reads). To avoid clashing with
other functions mutating the same state (e.g. etnaviv_gpu_update_clock)
the perfmon sampling needs to hold the GPU lock.

Fixes: 68dc0b295dcb ("drm/etnaviv: use 'sync points' for performance monitor requests")
Reviewed-by: Christian Gmeiner &lt;cgmeiner@igalia.com&gt;
Signed-off-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/etnaviv: Request pages from DMA32 zone on addressing_limited</title>
<updated>2024-12-05T13:01:50+00:00</updated>
<author>
<name>Xiaolei Wang</name>
<email>xiaolei.wang@windriver.com</email>
</author>
<published>2024-10-01T23:34:30+00:00</published>
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<id>urn:sha1:b18d12a05f6bea96e131a171f3d40ae6df5a0d54</id>
<content type='text'>
[ Upstream commit 13c96ac9a3f0f1c7ba1ff0656ea508e7fa065e7e ]

Remove __GFP_HIGHMEM when requesting a page from DMA32 zone,
and since all vivante GPUs in the system will share the same
DMA constraints, move the check of whether to get a page from
DMA32 to etnaviv_bind().

Fixes: b72af445cd38 ("drm/etnaviv: request pages from DMA32 zone when needed")
Suggested-by: Sui Jingfeng &lt;sui.jingfeng@linux.dev&gt;
Signed-off-by: Xiaolei Wang &lt;xiaolei.wang@windriver.com&gt;
Reviewed-by: Christian Gmeiner &lt;cgmeiner@igalia.com&gt;
Signed-off-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge drm/drm-next into drm-misc-next</title>
<updated>2024-07-29T07:35:54+00:00</updated>
<author>
<name>Thomas Zimmermann</name>
<email>tzimmermann@suse.de</email>
</author>
<published>2024-07-29T07:35:54+00:00</published>
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<id>urn:sha1:0e8655b4e852ef97655648b91ce780384a073ff4</id>
<content type='text'>
Backmerging to get a late RC of v6.10 before moving into v6.11.

Signed-off-by: Thomas Zimmermann &lt;tzimmermann@suse.de&gt;
</content>
</entry>
<entry>
<title>drm/scheduler: remove full_recover from drm_sched_start</title>
<updated>2024-07-25T12:05:12+00:00</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2024-07-19T15:24:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=83b501c1799a96a41e163973e88826253ffadfb3'/>
<id>urn:sha1:83b501c1799a96a41e163973e88826253ffadfb3</id>
<content type='text'>
This was basically just another one of amdgpus hacks. The parameter
allowed to restart the scheduler without turning fence signaling on
again.

That this is absolutely not a good idea should be obvious by now since
the fences will then just sit there and never signal.

While at it cleanup the code a bit.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Matthew Brost &lt;matthew.brost@intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20240722083816.99685-1-christian.koenig@amd.com
</content>
</entry>
<entry>
<title>drm/etnaviv: don't block scheduler when GPU is still active</title>
<updated>2024-06-26T13:33:25+00:00</updated>
<author>
<name>Lucas Stach</name>
<email>l.stach@pengutronix.de</email>
</author>
<published>2024-06-21T19:59:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=704d3d60fec451f37706368d9d3e320322978986'/>
<id>urn:sha1:704d3d60fec451f37706368d9d3e320322978986</id>
<content type='text'>
Since 45ecaea73883 ("drm/sched: Partial revert of 'drm/sched: Keep
s_fence-&gt;parent pointer'") still active jobs aren't put back in the
pending list on drm_sched_start(), as they don't have a active
parent fence anymore, so if the GPU is still working and the timeout
is extended, all currently active jobs will be freed.

To avoid prematurely freeing jobs that are still active on the GPU,
don't block the scheduler until we are fully committed to actually
reset the GPU.

As the current job is already removed from the pending list and
will not be put back when drm_sched_start() isn't called, we must
make sure to put the job back on the pending list when extending
the timeout.

Cc: stable@vger.kernel.org #6.0
Signed-off-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Reviewed-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Reviewed-by: Christian Gmeiner &lt;cgmeiner@igalia.com&gt;
</content>
</entry>
<entry>
<title>drm/etnaviv: reduce number of ktime_get calls in IRQ handler</title>
<updated>2024-06-26T13:32:47+00:00</updated>
<author>
<name>Lucas Stach</name>
<email>l.stach@pengutronix.de</email>
</author>
<published>2024-06-21T20:00:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=beb311ff0f2e1fcd0f033fcd1be45de083efc421'/>
<id>urn:sha1:beb311ff0f2e1fcd0f033fcd1be45de083efc421</id>
<content type='text'>
A single IRQ might signal the completion of multiple jobs/fences
at once. There is no point in attaching a new timestamp to each
fence that only differs in when exactly the IRQ handler was able
to process this fence.

Get a single timestamp when the IRQ handler has determined that
there are completed jobs and reuse this for all fences that get
signalled by the handler.

Signed-off-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Reviewed-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Reviewed-by: Christian Gmeiner &lt;cgmeiner@igalia.com&gt;
</content>
</entry>
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