<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpu/drm/amd, branch v4.19.27</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v4.19.27</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v4.19.27'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2019-03-05T16:58:49+00:00</updated>
<entry>
<title>drm/amd/powerplay: OD setting fix on Vega10</title>
<updated>2019-03-05T16:58:49+00:00</updated>
<author>
<name>Kenneth Feng</name>
<email>kenneth.feng@amd.com</email>
</author>
<published>2019-01-18T10:08:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=8c5571b9df10e88c6a98e76cb021ab5b32834c5c'/>
<id>urn:sha1:8c5571b9df10e88c6a98e76cb021ab5b32834c5c</id>
<content type='text'>
[ Upstream commit 6d87dc97eb3341de3f7b1efa3156cb0e014f4a96 ]

gfxclk for OD setting is limited to 1980M for non-acg
ASICs of Vega10

Signed-off-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix MST reboot/poweroff sequence</title>
<updated>2019-02-27T09:09:01+00:00</updated>
<author>
<name>Leo (Hanghong) Ma</name>
<email>hanghong.ma@amd.com</email>
</author>
<published>2019-01-24T20:07:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=0329973ec999114da5277284c24f64299da68985'/>
<id>urn:sha1:0329973ec999114da5277284c24f64299da68985</id>
<content type='text'>
commit d2f0b53bda3193874f3905bc839888f895d1c0cf upstream.

[Why]

drm_dp_mst_topology_mgr_suspend() is added into the new reboot
sequence, which disables the UP request at the beginning.
Therefore sideband messages are blocked.

[How]

Finish MST sideband message transaction before UP request is
suppressed.

Signed-off-by: Leo (Hanghong) Ma &lt;hanghong.ma@amd.com&gt;
Reviewed-by: Roman Li &lt;Roman.Li@amd.com&gt;
Acked-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>drm/amdgpu: Set DPM_FLAG_NEVER_SKIP when enabling PM-runtime</title>
<updated>2019-02-27T09:09:00+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2019-02-18T22:11:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6834afab4becec6d410e295948474a9abf7e1c17'/>
<id>urn:sha1:6834afab4becec6d410e295948474a9abf7e1c17</id>
<content type='text'>
commit d33158530660bc89be3cc870a2152e4e9a76cac7 upstream.

Based on a similar patch from Rafael for radeon.

When using ATPX to control dGPU power, the state is not retained
across suspend and resume cycles by default.  This can probably
be loosened for Hybrid Graphics (_PR3) laptops where I think the
state is properly retained.

Fixes: c62ec4610c40 ("PM / core: Fix direct_complete handling for devices with no callbacks")
Cc: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
Acked-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>drm/amd/display: fix PME notification not working in RV desktop</title>
<updated>2019-02-27T09:08:56+00:00</updated>
<author>
<name>Charlene Liu</name>
<email>charlene.liu@amd.com</email>
</author>
<published>2018-12-12T23:09:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=096a3170575f096d1f0ed56d999c65db9c635649'/>
<id>urn:sha1:096a3170575f096d1f0ed56d999c65db9c635649</id>
<content type='text'>
[ Upstream commit 20300db4aec5ba5edf6f0ad6f7111a51fbea7e10 ]

[Why]
PPLIB not receive the PME when unplug.

Signed-off-by: Charlene Liu &lt;charlene.liu@amd.com&gt;
Reviewed-by: Chris Park &lt;Chris.Park@amd.com&gt;
Acked-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amdkfd: Don't assign dGPUs to APU topology devices</title>
<updated>2019-02-27T09:08:55+00:00</updated>
<author>
<name>Felix Kuehling</name>
<email>Felix.Kuehling@amd.com</email>
</author>
<published>2019-01-02T22:47:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=bf846e9035b5dff964b055fc994e5743cfc1caec'/>
<id>urn:sha1:bf846e9035b5dff964b055fc994e5743cfc1caec</id>
<content type='text'>
[ Upstream commit bbdf514fe5648566b0754476cbcb92ac3422dde2 ]

dGPUs need their own topology devices. Don't assign them to APU topology
devices with CPU cores.

Bug: https://github.com/RadeonOpenCompute/ROCK-Kernel-Driver/issues/66
Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Tested-by: Elias Konstantinidis &lt;ekondis@gmail.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: set WRITE_BURST_LENGTH to 64B to workaround SDMA1 hang</title>
<updated>2019-02-20T09:25:42+00:00</updated>
<author>
<name>Jim Qu</name>
<email>Jim.Qu@amd.com</email>
</author>
<published>2018-12-17T09:00:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=46bf9a8c8bb0f2c746163737da5c7e4a42b48d61'/>
<id>urn:sha1:46bf9a8c8bb0f2c746163737da5c7e4a42b48d61</id>
<content type='text'>
[ Upstream commit 0c6c8125582714e1fd3544983eba3d750db0f5b8 ]

effect asics: VEGA10 and VEGA12

Signed-off-by: Jim Qu &lt;Jim.Qu@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/sriov:Correct pfvf exchange logic</title>
<updated>2019-02-20T09:25:39+00:00</updated>
<author>
<name>Emily Deng</name>
<email>Emily.Deng@amd.com</email>
</author>
<published>2018-12-29T09:46:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=f749f9702c9885c9fb48b78e8e74b43ecb857845'/>
<id>urn:sha1:f749f9702c9885c9fb48b78e8e74b43ecb857845</id>
<content type='text'>
[ Upstream commit b8cf66182eddb22e9c7539821ed6eecdb4f86d1a ]

The pfvf exchange need be in exclusive mode. And add pfvf exchange in gpu
reset.

Signed-off-by: Emily Deng &lt;Emily.Deng@amd.com&gt;
Reviewed-By: Xiangliang Yu &lt;Xiangliang.Yu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/powerplay: Fix missing break in switch</title>
<updated>2019-02-15T07:10:12+00:00</updated>
<author>
<name>Gustavo A. R. Silva</name>
<email>gustavo@embeddedor.com</email>
</author>
<published>2019-01-25T21:55:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=b81afe37ff5598d7bbb5efa5f2ef6997a5d48e5e'/>
<id>urn:sha1:b81afe37ff5598d7bbb5efa5f2ef6997a5d48e5e</id>
<content type='text'>
commit 2f10d823739680d2477ce34437e8a08a53117f40 upstream.

Add missing break statement in order to prevent the code from falling
through to the default case.

The resoning for this is that pclk_vol_table is an automatic variable.
So, it makes no sense to update it just before falling through to the
default case and return -EINVAL.

This bug was found thanks to the ongoing efforts to enabling
-Wimplicit-fallthrough.

Fixes: cd70f3d6e3fa ("drm/amd/powerplay: PP/DAL interface changes for dynamic clock switch")
Cc: stable@vger.kernel.org
Signed-off-by: Gustavo A. R. Silva &lt;gustavo@embeddedor.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>drm/amd/display: validate extended dongle caps</title>
<updated>2019-02-12T18:47:15+00:00</updated>
<author>
<name>Wenjing Liu</name>
<email>Wenjing.Liu@amd.com</email>
</author>
<published>2018-12-05T17:14:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=8f0132db09ad2ddd0889b484c494ca376f27b5dd'/>
<id>urn:sha1:8f0132db09ad2ddd0889b484c494ca376f27b5dd</id>
<content type='text'>
[ Upstream commit 99b922f9ed6a6313c0d2247cde8aa1e4a0bd67e4 ]

[why]
Some dongle doesn't have a valid extended dongle caps,
but we still set the extended dongle caps to be valid.
This causes validation fails for all timing.

[how]
If no dp_hdmi_max_pixel_clk is provided,
don't use extended dongle caps.

Signed-off-by: Wenjing Liu &lt;Wenjing.Liu@amd.com&gt;
Reviewed-by: Aric Cyr &lt;Aric.Cyr@amd.com&gt;
Reviewed-by: Jun Lei &lt;Jun.Lei@amd.com&gt;
Acked-by: Abdoulaye Berthe &lt;Abdoulaye.Berthe@amd.com&gt;
Acked-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: fix YCbCr420 blank color</title>
<updated>2019-02-12T18:47:13+00:00</updated>
<author>
<name>Eric Yang</name>
<email>Eric.Yang2@amd.com</email>
</author>
<published>2018-11-22T07:07:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=3564fa62a8d7ac531431fb0da97d71e94024e39f'/>
<id>urn:sha1:3564fa62a8d7ac531431fb0da97d71e94024e39f</id>
<content type='text'>
[ Upstream commit 12750d1647f118496f1da727146f255f5e44d500 ]

[Why]
YCbCr420 packing format uses two chanels for luma, and 1
channel for both chroma component. Our previous implementation
did not account for this and results in every other pixel having
very high luma value, showing greyish color instead of black.

YCbCr444 = &lt;Y1, Cb1, Cr1&gt;; &lt;Y2, Cb2, Cr2&gt; .....
YCbCr420 = &lt;Y1, Y2,  Cb1&gt;; &lt;Y3, Y4,  Cr1&gt; .....

[How]
Program the second channel with the black color value for luma
as well.

Signed-off-by: Eric Yang &lt;Eric.Yang2@amd.com&gt;
Reviewed-by: Hugo Hu &lt;Hugo.Hu@amd.com&gt;
Acked-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
</feed>
