<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpu/drm/amd, branch v4.14.98</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v4.14.98</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v4.14.98'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2018-12-21T13:13:07+00:00</updated>
<entry>
<title>drm/amdgpu: update SMC firmware image for polaris10 variants</title>
<updated>2018-12-21T13:13:07+00:00</updated>
<author>
<name>Junwei Zhang</name>
<email>Jerry.Zhang@amd.com</email>
</author>
<published>2018-12-07T07:15:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c8626858b2d873e2528d3099b896459947996247'/>
<id>urn:sha1:c8626858b2d873e2528d3099b896459947996247</id>
<content type='text'>
commit d55d8be0747c96db28a1d08fc24d22ccd9b448ac upstream.

Some new variants require different firmwares.

Signed-off-by: Junwei Zhang &lt;Jerry.Zhang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>drm/amdgpu: Add delay after enable RLC ucode</title>
<updated>2018-12-17T08:28:53+00:00</updated>
<author>
<name>shaoyunl</name>
<email>shaoyun.liu@amd.com</email>
</author>
<published>2018-11-22T16:45:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=cc92ade5f498bb56f2316588c954d7371849b27b'/>
<id>urn:sha1:cc92ade5f498bb56f2316588c954d7371849b27b</id>
<content type='text'>
[ Upstream commit ad97d9de45835b6a0f71983b0ae0cffd7306730a ]

Driver shouldn't try to access any GFX registers until RLC is idle.
During the test, it took 12 seconds for RLC to clear the BUSY bit
in RLC_GPM_STAT register which is un-acceptable for driver.
As per RLC engineer, it would take RLC Ucode less than 10,000 GFXCLK
cycles to finish its critical section. In a lowest 300M enginer clock
setting(default from vbios), 50 us delay is enough.

This commit fix the hang when RLC introduce the work around for XGMI
which requires more cycles to setup more registers than normal

Signed-off-by: shaoyunl &lt;shaoyun.liu@amd.com&gt;
Acked-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/gmc8: update MC firmware for polaris</title>
<updated>2018-12-13T08:18:53+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2018-11-29T04:25:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=eff5e74f7b680d51c9cd9a087f18ce99788b2aba'/>
<id>urn:sha1:eff5e74f7b680d51c9cd9a087f18ce99788b2aba</id>
<content type='text'>
commit a81a7c9c9ea3042ab02d66ac35def74abf091c15 upstream.

Some variants require different MC firmware images.

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Junwei Zhang &lt;Jerry.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>drm/amdgpu: update mc firmware image for polaris12 variants</title>
<updated>2018-12-13T08:18:53+00:00</updated>
<author>
<name>Junwei Zhang</name>
<email>Jerry.Zhang@amd.com</email>
</author>
<published>2018-11-22T09:53:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=99e6900dfa125ef5062e7b0595f6ce5eb75a6d2c'/>
<id>urn:sha1:99e6900dfa125ef5062e7b0595f6ce5eb75a6d2c</id>
<content type='text'>
commit d7fd67653f847327e545bdb198b901ee124afd7c upstream.

Some new variants require updated firmware.

Signed-off-by: Junwei Zhang &lt;Jerry.Zhang@amd.com&gt;
Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>drm/amdgpu: add missing CHIP_HAINAN in amdgpu_ucode_get_load_type</title>
<updated>2018-11-21T08:24:16+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2018-08-28T19:16:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=a02eadf0639bb5e007e7e270385b97e9c0a4a944'/>
<id>urn:sha1:a02eadf0639bb5e007e7e270385b97e9c0a4a944</id>
<content type='text'>
commit d9997b64c52b70bd98c48f443f068253621d1ffc upstream.

This caused a confusing error message, but there is functionally
no problem since the default method is DIRECT.

Reviewed-by: Michel Dänzer &lt;michel.daenzer@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>drm/amdgpu: Fix SDMA HQD destroy error on gfx_v7</title>
<updated>2018-10-18T07:16:23+00:00</updated>
<author>
<name>Amber Lin</name>
<email>Amber.Lin@amd.com</email>
</author>
<published>2018-09-13T01:42:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=059726864271e14a6fbc5f47bb15098a7e1d1d89'/>
<id>urn:sha1:059726864271e14a6fbc5f47bb15098a7e1d1d89</id>
<content type='text'>
[ Upstream commit caaa4c8a6be2a275bd14f2369ee364978ff74704 ]

A wrong register bit was examinated for checking SDMA status so it reports
false failures. This typo only appears on gfx_v7. gfx_v8 checks the correct
bit.

Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Amber Lin &lt;Amber.Lin@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Sasha Levin &lt;alexander.levin@microsoft.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Fix vce work queue was not cancelled when suspend</title>
<updated>2018-10-13T07:27:23+00:00</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2018-09-27T12:48:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=0c0dd182adae698ae108566e1300c498305d5aeb'/>
<id>urn:sha1:0c0dd182adae698ae108566e1300c498305d5aeb</id>
<content type='text'>
commit 61ea6f5831974ebd1a57baffd7cc30600a2e26fc upstream.

The vce cancel_delayed_work_sync never be called.
driver call the function in error path.

This caused the A+A suspend hang when runtime pm enebled.
As we will visit the smu in the idle queue. this will cause
smu hang because the dgpu has been suspend, and the dgpu also
will be waked up. As the smu has been hang, so the dgpu resume
will failed.

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Feifei Xu &lt;Feifei.Xu@amd.com&gt;
Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>drm/amdgpu: fix error handling in amdgpu_cs_user_fence_chunk</title>
<updated>2018-10-10T06:54:26+00:00</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2018-09-10T13:52:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=f7b86faf0bd11ae44d009d7d68ec8af5491119fe'/>
<id>urn:sha1:f7b86faf0bd11ae44d009d7d68ec8af5491119fe</id>
<content type='text'>
[ Upstream commit 0165de983272d1fae0809ed9db47c46a412279bc ]

Slowly leaking memory one page at a time :)

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Sasha Levin &lt;alexander.levin@microsoft.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add another ATPX quirk for TOPAZ</title>
<updated>2018-10-10T06:54:18+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2018-07-17T15:52:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=a17e2a72e714ca20c31e41827ab6088df896c190'/>
<id>urn:sha1:a17e2a72e714ca20c31e41827ab6088df896c190</id>
<content type='text'>
commit b3fc2ab37e27f8d6588a4755382346ba2335a7c7 upstream.

Needs ATPX rather than _PR3.

Bug: https://bugzilla.kernel.org/show_bug.cgi?id=200517
Reviewed-by: Junwei Zhang &lt;Jerry.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Signed-off-by: Sudip Mukherjee &lt;sudipm.mukherjee@gmail.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/pp: initialize result to before or'ing in data</title>
<updated>2018-10-10T06:54:18+00:00</updated>
<author>
<name>Colin Ian King</name>
<email>colin.king@canonical.com</email>
</author>
<published>2018-06-06T12:18:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=d9e61345652beaafc371092fd7a4532ef351b759'/>
<id>urn:sha1:d9e61345652beaafc371092fd7a4532ef351b759</id>
<content type='text'>
commit c4ff91dd40e2253ab6dd028011469c2c694e1e19 upstream.

The current use of result is or'ing in values and checking for
a non-zero result, however, result is not initialized to zero
so it potentially contains garbage to start with. Fix this by
initializing it to the first return from the call to
vega10_program_didt_config_registers.

Detected by cppcheck:
"(error) Uninitialized variable: result"

Fixes: 9b7b8154cdb8 ("drm/amd/powerplay: added didt support for vega10")
Signed-off-by: Colin Ian King &lt;colin.king@canonical.com&gt;
Acked-by: Huang Rui &lt;ray.huang@amd.com&gt;
[Fix the subject as Colin's comment]
Signed-off-by: Huang Rui &lt;ray.huang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Signed-off-by: Sudip Mukherjee &lt;sudipm.mukherjee@gmail.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
</feed>
