kernel/linux.git/drivers/gpu/drm/amd/pm/amdgpu_dpm.c, branch v6.19.12

drm/amd/pm: Return -EOPNOTSUPP when can't read power limit

2026-02-26T23:01:02+00:00

[ Upstream commit e53dcefe30df4f317161f36e8bc11926e7dd7a2e ] So that hwmon_attributes_visible() will see that the power2_cap attributes should not be visible on GPUs that don't support the get_power_limit() function. This fixes an error when running the "sensors" command on SI. Fixes: 12c958d1db36 ("drm/amd/pm: Expose ppt1 limit for gc_v9_5_0") Reviewed-by: Alex Deucher Signed-off-by: Timur Kristóf Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin

drm/amd/pm: fix race in power state check before mutex lock

2026-01-27T23:25:15+00:00

The power state check in amdgpu_dpm_set_powergating_by_smu() is done before acquiring the pm mutex, leading to a race condition where: 1. Thread A checks state and thinks no change is needed 2. Thread B acquires mutex and modifies the state 3. Thread A returns without updating state, causing inconsistency Fix this by moving the mutex lock before the power state check, ensuring atomicity of the state check and modification. Fixes: 6ee27ee27ba8 ("drm/amd/pm: avoid duplicate powergate/ungate setting") Signed-off-by: Yang Wang Reviewed-by: Kenneth Feng Signed-off-by: Alex Deucher (cherry picked from commit 7a3fbdfd19ec5992c0fc2d0bd83888644f5f2f38)

drm/amd/pm: adjust the visibility of pp_table sysfs node

2025-11-24T17:36:12+00:00

v1: - make pp_table invisible on VF mode (only valid on BM) - make pp_table invisible on Mi* chips (Not supported) - make pp_table invisible if scpm feature is enabled. v2: move pp_table invisible code logic into amdgpu_dpm_get_pp_table() function. v3: add table buffer pointer check both on powerplay & swsmu. Signed-off-by: Yang Wang Reviewed-by: Lijo Lazar Signed-off-by: Alex Deucher

drm/amd/pm: add smu ras driver framework

2025-11-04T16:53:58+00:00

add functions to get smu ras driver Signed-off-by: Gangliang Xie Signed-off-by: Yang Wang Reviewed-by: Tao Zhou Signed-off-by: Alex Deucher

drm/amdgpu: Drop PMFW RLC notifier from amdgpu_device_suspend()

2025-11-04T16:52:48+00:00

For S3 on vangogh, PMFW needs to be notified before the driver powers down RLC. This already happens in smu_disable_dpms() so drop the superfluous call in amdgpu_device_suspend(). Co-developed-by: Mario Limonciello (AMD) Reviewed-by: Alex Deucher Signed-off-by: Mario Limonciello (AMD) Signed-off-by: Alex Deucher

drm/amd: Stop overloading power limit with limit type

2025-10-13T18:14:35+00:00

When passed around internally the upper 8 bits of power limit include the limit type. This is non-obvious without digging into the nuances of each function. Instead pass the limit type as an argument to all applicable layers. Reviewed-by: Lijo Lazar Signed-off-by: Mario Limonciello Signed-off-by: Alex Deucher

drm/amd/pm: Add VCN reset support check capability

2025-08-15T17:04:25+00:00

This change introduces infrastructure to check whether VCN reset is supported by the SMU firmware. Key changes include: 1. Added new functions to query VCN reset support: - amdgpu_dpm_reset_vcn_is_supported() - smu_reset_vcn_is_supported() - pptable_funcs.reset_vcn_is_supported callback 2. Implemented proper locking in the DPM layer with mutex protection 3. Maintained consistency with existing SDMA reset support checks The new capability allows callers to check for VCN reset support before attempting the operation, preventing unnecessary attempts on unsupported platforms. v2: clean up debug info(Alex) Suggested-by: Alex Deucher Signed-off-by: Ruili Ji Signed-off-by: Jesse Zhang Reviewed-by: Lijo Lazar Signed-off-by: Alex Deucher

drm/amdgpu: Generate BP threshold exceed CPER once threshold exceeded

2025-08-06T18:21:01+00:00

The bad pages threshold exceed CPER should be generated once threshold exceeded, no matter the bad_page_threshold setted or not. Signed-off-by: Xiang Liu Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher

drm/amd/pm: Add dpm interface for temp metrics

2025-08-06T18:20:34+00:00

Add dpm interface to get gpuboard/baseboard temperature metrics v2: Add temperature metrics support check(Lijo) v3: Return error code in case of operation not supported(Lijo) Signed-off-by: Asad Kamal Reviewed-by: Lijo Lazar Signed-off-by: Alex Deucher

drm/amd/pm: Add support to set min ISP clocks

2025-06-24T14:02:44+00:00

Add support to set ISP clocks for SMU v14.0.0. ISP driver uses amdgpu_dpm_set_soft_freq_range() API to set clocks via SMU interface than communicating with PMFW directly. amdgpu_dpm_set_soft_freq_range() is updated to take in any pp_clock_type than limiting to support only PP_SCLK to allow ISP and other driver modules to set the min/max clocks. Any clock specific restrictions are expected to be taken care in SOC specific SMU implementations instead of generic amdgpu_dpm and amdgpu_smu interfaces. Reviewed-by: Xiaojian Du Reviewed-by: Lijo Lazar Reviewed-by: Mario Limonciello Signed-off-by: Pratap Nirujogi Signed-off-by: Alex Deucher