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<title>kernel/linux.git/drivers/gpu/drm/amd/pm/Makefile, branch v6.12.80</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.12.80</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.12.80'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2023-10-13T14:59:55+00:00</updated>
<entry>
<title>drm/amd/swsmu: add smu14 ip support</title>
<updated>2023-10-13T14:59:55+00:00</updated>
<author>
<name>Kenneth Feng</name>
<email>kenneth.feng@amd.com</email>
</author>
<published>2023-04-26T06:02:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=fe6cd9152464ed086fbeb45b6118ca386ee7aca2'/>
<id>urn:sha1:fe6cd9152464ed086fbeb45b6118ca386ee7aca2</id>
<content type='text'>
Add initial swSMU support for smu 14 series ASIC.

v2: squash in build fixes and updates (Li Ma)
    fix warnings (Alex)
v3: squash in updates (Alex)
v4: squash in updates (Alex)
v5: squash in avg/current power updates (Alex)

Signed-off-by: Li Ma &lt;li.ma@amd.com&gt;
Signed-off-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Signed-off-by: Likun Gao &lt;Likun.Gao@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm: relocate the power related headers</title>
<updated>2022-01-14T22:51:14+00:00</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2021-11-16T05:30:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=837d542a09cd533055423dfca7e621a9c1d13c5b'/>
<id>urn:sha1:837d542a09cd533055423dfca7e621a9c1d13c5b</id>
<content type='text'>
Instead of centralizing all headers in the same folder. Separate them into
different folders and place them among those source files those who really
need them.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm: optimize the amdgpu_pm_compute_clocks() implementations</title>
<updated>2022-01-14T22:51:14+00:00</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2021-11-17T02:46:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6ddbd37f10749830e0a6ddf839ca4313a007d3f5'/>
<id>urn:sha1:6ddbd37f10749830e0a6ddf839ca4313a007d3f5</id>
<content type='text'>
Drop cross callings and multi-function APIs. Also avoid exposing
internal implementations details.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/swsmu: add aldebaran smu13 ip support (v3)</title>
<updated>2021-03-24T02:54:24+00:00</updated>
<author>
<name>Kevin Wang</name>
<email>kevin1.wang@amd.com</email>
</author>
<published>2020-10-20T16:09:36+00:00</published>
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<id>urn:sha1:c05d1c401572ac63d704183b19db2ce746961412</id>
<content type='text'>
Add initial swSMU support.

v1: add smu13 ip support for aldebaran asic (Kevin/Kenneth)
v2: switch to thm/mp v13_0 ip headers (Hawking)
v3: squash in updates (Alex)

Signed-off-by: Kevin Wang &lt;kevin1.wang@amd.com&gt;
Signed-off-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Reviewed-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm: optimize the power related source code layout</title>
<updated>2020-08-14T20:22:41+00:00</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2020-08-13T08:39:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=e098bc9612c2b60f94920461d71c92962a916e73'/>
<id>urn:sha1:e098bc9612c2b60f94920461d71c92962a916e73</id>
<content type='text'>
The target is to provide a clear entry point(for power routines).
Also this can help to maintain a clear view about the frameworks
used on different ASICs. Hopefully all these can make power part
more friendly to play with.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
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