<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpu/drm/amd/include, branch v5.16.1</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v5.16.1</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v5.16.1'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2021-12-17T17:47:29+00:00</updated>
<entry>
<title>drm/amdgpu: add support for IP discovery gc_info table v2</title>
<updated>2021-12-17T17:47:29+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2021-12-16T03:13:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=5e713c6afa34c0fd6f113bf7bb1c2847172d7b20'/>
<id>urn:sha1:5e713c6afa34c0fd6f113bf7bb1c2847172d7b20</id>
<content type='text'>
Used on gfx9 based systems. Fixes incorrect CU counts reported
in the kernel log.

Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1833
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amd/pm: avoid duplicate powergate/ungate setting</title>
<updated>2021-11-17T22:41:20+00:00</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2021-11-05T07:25:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6ee27ee27ba8b2e725886951ba2d2d87f113bece'/>
<id>urn:sha1:6ee27ee27ba8b2e725886951ba2d2d87f113bece</id>
<content type='text'>
Just bail out if the target IP block is already in the desired
powergate/ungate state. This can avoid some duplicate settings
which sometimes may cause unexpected issues.

Link: https://lore.kernel.org/all/YV81vidWQLWvATMM@zn.tnic/
Bug: https://bugzilla.kernel.org/show_bug.cgi?id=214921
Bug: https://bugzilla.kernel.org/show_bug.cgi?id=215025
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1789
Fixes: bf756fb833cb ("drm/amdgpu: add missing cleanups for Polaris12 UVD/VCE on suspend")
Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Tested-by: Borislav Petkov &lt;bp@suse.de&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amd/display: Disable hdmistream and hdmichar clocks</title>
<updated>2021-10-19T21:20:28+00:00</updated>
<author>
<name>Jake Wang</name>
<email>haonan.wang2@amd.com</email>
</author>
<published>2021-09-23T03:37:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=e7414a1a185ead49e8b7e0fa6952e74cfe4a76f4'/>
<id>urn:sha1:e7414a1a185ead49e8b7e0fa6952e74cfe4a76f4</id>
<content type='text'>
[Why &amp; How]
Disable hdmistream and hdmichar root clocks when not being used.

Reviewed-by: Aric Cyr &lt;Aric.Cyr@amd.com&gt;
Acked-by: Agustin Gutierrez Sanchez &lt;agustin.gutierrez@amd.com&gt;
Signed-off-by: Jake Wang &lt;haonan.wang2@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Enable PSR by default on newer DCN</title>
<updated>2021-10-13T18:14:34+00:00</updated>
<author>
<name>Nicholas Kazlauskas</name>
<email>nicholas.kazlauskas@amd.com</email>
</author>
<published>2021-10-05T14:55:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=9470620e99e90999dc367bdcccc7e1274dcbb796'/>
<id>urn:sha1:9470620e99e90999dc367bdcccc7e1274dcbb796</id>
<content type='text'>
[Why]
For optimal power savings on panels that can support it.

This was previously left disabled by default because of issues with
compositors that do not pageflip and scan out directly to the
frontbuffer.

For these compositors we now have detection methods that wait for x
number of pageflips after a full update - triggered by a buffer or
format change typically.

This may introduce bugs or new cases not tested by users so this is
only currently targeting newer DCN.

[How]
Add code in DM to set PSR state by default for newer DCN while falling
back to the feature mask for older.

Add a global debug flag that can be set to disable it for either.

Signed-off-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add HWID of SDMA instance 2 and 3</title>
<updated>2021-10-04T19:23:01+00:00</updated>
<author>
<name>Guchun Chen</name>
<email>guchun.chen@amd.com</email>
</author>
<published>2021-09-03T10:03:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=de309ab3263e457ebb078fa41b2ff5db26353160'/>
<id>urn:sha1:de309ab3263e457ebb078fa41b2ff5db26353160</id>
<content type='text'>
They are missed.

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add cyan_skillfish asic header files</title>
<updated>2021-09-29T21:30:00+00:00</updated>
<author>
<name>Zhan Liu</name>
<email>zhan.liu@amd.com</email>
</author>
<published>2021-09-25T07:51:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=0ad53fe3ae82443c74ff8cfd7bd13377cc1134a3'/>
<id>urn:sha1:0ad53fe3ae82443c74ff8cfd7bd13377cc1134a3</id>
<content type='text'>
This patch is to add cyan_skillfish asic header files.

Signed-off-by: Charlene Liu &lt;charlene.liu@amd.com&gt;
Signed-off-by: Zhan Liu &lt;zhan.liu@amd.com&gt;
Reviewed-by: Charlene Liu &lt;charlene.liu@amd.com&gt;
Acked-by: Jun Lei &lt;jun.lei@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>gpu: amd: replace open-coded offsetof() with builtin</title>
<updated>2021-09-29T21:30:00+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2021-09-27T12:20:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=0069a2273837f199cb93d539a64daeba072a5a2a'/>
<id>urn:sha1:0069a2273837f199cb93d539a64daeba072a5a2a</id>
<content type='text'>
The two AMD drivers have their own custom offsetof() implementation
that now triggers a warning with recent versions of clang:

drivers/gpu/drm/radeon/radeon_atombios.c:133:14: error: performing pointer subtraction with a null pointer has undefined behavior [-Werror,-Wnull-pointer-subtraction]

Change all the instances to use the normal offsetof() provided
by the kernel that does not have this problem.

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/amdgpu: Add missing mp_11_0_8_sh_mask.h header</title>
<updated>2021-09-29T21:30:00+00:00</updated>
<author>
<name>Tom St Denis</name>
<email>tom.stdenis@amd.com</email>
</author>
<published>2021-09-24T14:28:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=ce9c1d8c715c4c19a220d8a383e7add99ab4d04d'/>
<id>urn:sha1:ce9c1d8c715c4c19a220d8a383e7add99ab4d04d</id>
<content type='text'>
The commit 2766534b766e1b12e0fa0a4e2e26929e808fde71 added the offset
header but didn't add the masks.  This adds the masks based on what
was selected for the offsets.

Signed-off-by: Tom St Denis &lt;tom.stdenis@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add poison mode query for DF (v2)</title>
<updated>2021-09-28T13:30:06+00:00</updated>
<author>
<name>Tao Zhou</name>
<email>tao.zhou1@amd.com</email>
</author>
<published>2021-09-17T10:15:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=ca5c636dc6a274693c5c3b4229f16e775d428b7f'/>
<id>urn:sha1:ca5c636dc6a274693c5c3b4229f16e775d428b7f</id>
<content type='text'>
Add ras poison mode query interface for DF.

v2: replace RREG32_PCIE with RREG32_SOC15.

Signed-off-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix B0 USB-C DP Alt mode</title>
<updated>2021-09-23T19:17:30+00:00</updated>
<author>
<name>Liu, Zhan</name>
<email>Zhan.Liu@amd.com</email>
</author>
<published>2021-09-09T17:26:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=bdd1a21b52557ea8f61d0a5dc2f77151b576eb70'/>
<id>urn:sha1:bdd1a21b52557ea8f61d0a5dc2f77151b576eb70</id>
<content type='text'>
[Why]
Starting from B0, along with RDPCSTX, RDPCSPIPE registers are also used.

[How]
Make sure RDPCSPIPE registers are programmed correctly.

Reviewed-by: Charlene Liu &lt;charlene.liu@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Zhan Liu &lt;Zhan.Liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
