kernel/linux.git/drivers/gpu/drm/amd/include, branch v4.18.14Linux kernel stable tree (mirror)https://git.radix-linux.su/kernel/linux.git/atom?h=v4.18.142018-06-28T19:06:10+00:00drm/amd/powerplay: smc_dpm_info structure change2018-06-28T19:06:10+00:00Evan Quanevan.quan@amd.com2018-06-11T07:20:39+00:00urn:sha1:1513b1c93f825f74751897258e0bdde64fd3bb6a
A new member Vr2_I2C_address is added.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/include: Update df 3.6 mask and shift definition2018-06-13T18:45:23+00:00Shaoyun LiuShaoyun.Liu@amd.com2018-06-12T17:35:44+00:00urn:sha1:b0f6b8090e05a24263207a399b6c48a94034f1e8
The register field hsas been changed in df 3.6, update to correct setting
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: correct SMU11 SYSPLL0 clock id values2018-05-30T17:35:06+00:00Evan Quanevan.quan@amd.com2018-05-28T00:53:03+00:00urn:sha1:ee7a99c79aa3b15e9b6157f8949a1ad8c170f17f
The SMU11 SYSPLL0 clock ids were assigned wrong values.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Update GFX info structure to match what vega20 used2018-05-24T15:07:55+00:00Shaoyun LiuShaoyun.Liu@amd.com2018-05-22T15:45:41+00:00urn:sha1:f9fb22a21b380b14f70048fe719875e3523ac7d8
Update to the latest version from the vbios team.
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Add CG/PG flags for VCN2018-05-24T05:16:57+00:00Rex ZhuRex.Zhu@amd.com2018-05-16T12:10:25+00:00urn:sha1:8dbb8cdf52dbc264d531d1e51f5e311bd1558c21
Define new clock and powergating flags for VCN block.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add new DF 1.7 register defs2018-05-24T04:51:20+00:00Alex Deucheralexander.deucher@amd.com2018-05-10T19:45:12+00:00urn:sha1:99631045862e2994b47285a8cc96bc939ae5b42f
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add df 3.6 headers2018-05-18T21:08:15+00:00Alex Deucheralexander.deucher@amd.com2018-05-14T16:50:46+00:00urn:sha1:9883e9d751dad05e8c3ad3c6b769dafc60762c38
Needed for vega20.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/vg20:Add IH client ID for the 2nd UVD2018-05-18T21:08:13+00:00James ZhuJames.Zhu@amd.com2018-04-24T00:49:28+00:00urn:sha1:915893fd2b7bdb0e1e0a16ca402345ebc60e391b
For Vega20, there are two UVD hardware. Need add
the 2nd IH client ID for the 2nd UVD Hardware.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/atomfirmware: add new gfx_info data table v2.4 (v2)2018-05-17T15:13:21+00:00Alex Deucheralexander.deucher@amd.com2018-03-16T02:32:27+00:00urn:sha1:6f68711dd63522aab34c3e9513fa42a7586a95e5
Adds additional gfx configuration data.
v2: fix typo
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd: Add dce-12.1 gpio aux registers (v2)2018-05-17T15:13:19+00:00Roman LiRoman.Li@amd.com2018-02-14T22:20:54+00:00urn:sha1:d82420b56a17d5b39579bc46f8dad757be684f94
Updating dce12 register headers by adding dc registers
required for potential DP LTTPR support.
v2: fix mode change
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Roman Li <Roman.Li@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>