kernel/linux.git/drivers/gpu/drm/amd/include/asic_reg, branch v6.19.12Linux kernel stable tree (mirror)https://git.radix-linux.su/kernel/linux.git/atom?h=v6.19.122025-11-12T02:54:18+00:00drm/amdgpu/vce1: Clean up register definitions2025-11-12T02:54:18+00:00Timur Kristóftimur.kristof@gmail.com2025-11-07T15:57:39+00:00urn:sha1:1b8ed1168a78e21acac5ee8ba6de42e7ccc2360f
The sid.h header contained some VCE1 register definitions, but
they were using byte offsets (probably copied from the old radeon
driver). Move all of these to the proper VCE1 headers and ensure
they are in dword offsets.
Also add the register definitions that we need for the
firmware validation mechanism in VCE1.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Co-developed-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Add additional DCE6 SCL registers2025-10-07T18:09:06+00:00Alex Deucheralexander.deucher@amd.com2025-09-25T18:45:21+00:00urn:sha1:507296328b36ffd00ec1f4fde5b8acafb7222ec7
Fixes: 102b2f587ac8 ("drm/amd/display: dce_transform: DCE6 Scaling Horizontal Filter Init (v2)")
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Add some missing register headers for DCN4012025-05-28T20:01:50+00:00Aurabindo Pillaiaurabindo.pillai@amd.com2025-05-21T19:59:56+00:00urn:sha1:d78eb800f8f5169db89a28380631aefc224a76bb
Add some HDCP related register headers for future use.
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Reviewed-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Add jpeg poison status reg2025-05-22T16:02:49+00:00Mangesh GadreMangesh.Gadre@amd.com2025-05-14T05:17:02+00:00urn:sha1:8d74ce4e5524b39e991bfa025f1382e54c5f710a
added registers to enable jpeg ras
Signed-off-by: Mangesh Gadre <Mangesh.Gadre@amd.com>
Reviewed-by: Stanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Add vcn poison status reg2025-05-22T16:02:10+00:00Mangesh GadreMangesh.Gadre@amd.com2025-05-14T04:31:36+00:00urn:sha1:f55fcf15a9c585d0a3f294307f1499d3759459c6
added register to enable vcn ras
Signed-off-by: Mangesh Gadre <Mangesh.Gadre@amd.com>
Reviewed-by: Stanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add vcn v5_0_0 ip headers2025-05-13T13:31:51+00:00fanhuangFangSheng.Huang@amd.com2025-05-06T06:49:18+00:00urn:sha1:80f66ca7a45889d2a8eecf61c3069117b3279b3f
Add vcn v5_0_0 register offset and shift masks
header files
Only include the registers required for MMSCH
initialization
Signed-off-by: fanhuang <FangSheng.Huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add missing SMU6 defines, shifts and masks2025-04-07T19:18:58+00:00Alexandre Demersalexandre.f.demers@gmail.com2025-03-28T05:10:15+00:00urn:sha1:340f1d9fcd6218e7c9a9506a37beaddb29f01b73
They will be used later when switching away from sid.h/si_enums.h.
Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: keep removing sid.h dependency from si_dma.c2025-04-07T19:18:33+00:00Alexandre Demersalexandre.f.demers@gmail.com2025-03-22T01:46:58+00:00urn:sha1:d35a412910906ffdcb46a33b20ccd4676b62fccd
Move and rename DMA_SEM_INCOMPLETE_TIMER_CNTL and DMA_SEM_WAIT_FAIL_TIMER_CNTL
in oss_1_0_d.h
Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add missing GFX6 defines2025-04-07T19:18:33+00:00Alexandre Demersalexandre.f.demers@gmail.com2025-03-22T01:46:51+00:00urn:sha1:535b6191904dd5a4f26c332ccc40c68f6d2b1233
They will be used later when switching away from sid.h/si_enums.h.
v2: fix whitespace (Alex)
Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add missing DMA defines, shifts and masks2025-04-07T19:18:33+00:00Alexandre Demersalexandre.f.demers@gmail.com2025-03-22T01:46:50+00:00urn:sha1:0ba7e47e8e3d1d6abad810d68b4b1a52c90a9242
They will be used later when switching away from sid.h/si_enums.h.
v2: fix up whitespace (Alex)
Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>