kernel/linux.git/drivers/gpu/drm/amd/include/asic_reg, branch v5.12.1

drm/amdgpu: add SMUIO 11.0.6 register headers

2021-02-09T20:28:11+00:00

Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher

drm/amdgpu: add osssys v4_2 ip headers (v2)

2020-12-23T20:05:20+00:00

v1: add osssys v4_2 register offset and shift masks header files. vega20 and arcturus will refer to these ip headers. (Hawking) v2: clean up osssys v4_2 registers (Alex) Signed-off-by: Hawking Zhang Signed-off-by: Alex Deucher Acked-by: Christian König Acked-by: Felix Kuehling Reviewed-by: Dennis Li Reviewed-by: Feifei Xu

drm/amdgpu: Add and use seperate reg headers for dcn302

2020-11-10T19:15:08+00:00

Currently we are using dcn3 reg headers for dcn302. The offsets are different between the two so they need seperate headers. Add dcn302 header files and use these instead of dcn3 header Signed-off-by: Bhawanpreet Lakha Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu: add GC 10.3 NOALLOC registers

2020-10-23T19:33:47+00:00

This adds the NOALLOC registers. Signed-off-by: Alex Deucher

drm/amdgpu: add missing newline at eof

2020-10-15T16:20:12+00:00

Representative checkpatch.pl warning WARNING: adding a line without newline at end of file 30: FILE: drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.h:30: +#endif Signed-off-by: Tom Rix Signed-off-by: Alex Deucher

drm/amdgpu: add vangogh asic header files (v2)

2020-10-05T19:14:02+00:00

This patch is to add vangogh asic header files. v2: squash in updates Signed-off-by: Huang Rui Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu: update athub interrupt harvesting handle

2020-09-22T21:37:38+00:00

GCEA/MMHUB EA error should not result to DF freeze, this is fixed in next generation, but for some reasons the GCEA/MMHUB EA error will result to DF freeze in previous generation, diver should avoid to indicate GCEA/MMHUB EA error as hw fatal error in kernel message by read GCEA/MMHUB err status registers. Changed from V1: make query_ras_error_status function more general make read mmhub er status register more friendly Changed from V2: move ras error status query function into do_recovery workqueue Changed from V3: remove useless code from V2, print GCEA error status instance number Signed-off-by: Stanley.Yang Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher

drm/amdgpu: add VCN 3.0 AV1 registers

2020-09-17T22:01:46+00:00

This adds the AV1 registers. Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher

drm/amdgpu: add the GC 10.3 VRS registers

2020-09-17T22:00:50+00:00

Add the VRS registers. Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher

drm/amd/amdgpu: add mmUVD_FW_STATUS register to uvd700

2020-09-17T21:59:54+00:00

This register was requested for umr debugging support. Signed-off-by: Tom St Denis Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher