kernel/linux.git/drivers/gpu/drm/amd/display/modules, branch v6.1.38

drm/amd/display: fix a divided-by-zero error

2023-05-11T14:03:03+00:00

[ Upstream commit 0b5dfe12755f87ec014bb4cc1930485026167430 ] [Why & How] timing.dsc_cfg.num_slices_v can be zero and it is necessary to check before using it. This fixes the error "divide error: 0000 [#1] PREEMPT SMP NOPTI". Reviewed-by: Aurabindo Pillai Acked-by: Qingqing Zhuo Signed-off-by: Alex Hung Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher Cc: stable@vger.kernel.org Signed-off-by: Sasha Levin

drm/amd/display: fix PSR-SU/DSC interoperability support

2023-05-11T14:03:03+00:00

[ Upstream commit 13b90cf900ab69dd5cab3cc5035bc7614037e64e ] Currently, there are issues with enabling PSR-SU + DSC. This stems from the fact that DSC imposes a slice height on transmitted video data and we are not conforming to that slice height in PSR-SU regions. So, pass slice_height into su_y_granularity to feed the DSC slice height into PSR-SU code. Acked-by: Harry Wentland Signed-off-by: Hamza Mahfooz Signed-off-by: Alex Deucher Stable-dep-of: 0b5dfe12755f ("drm/amd/display: fix a divided-by-zero error") Signed-off-by: Sasha Levin

drm/amd/display: fix transfer function passed to build_coefficients()

2022-10-11T15:33:31+00:00

The default argument should be enum TRANSFER_FUNCTION_SRGB rather than the current boolean value which improperly maps to TRANSFER_FUNCTION_BT709. Commit 9b3d76527f6e ("drm/amd/display: Revert adding degamma coefficients") looks to have improperly reverted commit d02097095916 ("drm/amd/display: Add regamma/degamma coefficients and set sRGB when TF is BT709") replacing the enum value with a boolean value. Cc: Krunoslav Kovac Cc: Jaehyun Chung Cc: Zeng Heng Fixes: 9b3d76527f6e ("drm/amd/display: Revert adding degamma coefficients") Reviewed-by: Harry Wentland Signed-off-by: Alex Deucher

drm/amd/display: Limit user regamma to a valid value

2022-09-13T18:33:00+00:00

[Why] For HDR mode, we get total 512 tf_point and after switching to SDR mode we actually get 400 tf_point and the rest of points(401~512) still use dirty value from HDR mode. We should limit the rest of the points to max value. [How] Limit the value when coordinates_x.x > 1, just like what we do in translate_from_linear_space for other re-gamma build paths. Tested-by: Daniel Wheeler Reviewed-by: Krunoslav Kovac Reviewed-by: Aric Cyr Acked-by: Pavle Kotarac Signed-off-by: Yao Wang1 Signed-off-by: Alex Deucher

drm/amd/display: Fix HDMI VSIF V3 incorrect issue

2022-08-10T19:12:13+00:00

[Why] Reported from customer the checksum in AMD VSIF V3 is incorrect and causing blank screen issue. [How] Fix the packet length issue on AMD HDMI VSIF V3. Reviewed-by: Anthony Koo Acked-by: Tom Chung Signed-off-by: Leo Ma Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Disable PSRSU when DSC enabled on the specific sink

2022-07-12T20:50:29+00:00

[Why] Some specific sink is not able to support PSRSU when DSC is turned on. For this case, fall-back to use PSR1. Reviewed-by: Anthony Koo Acked-by: Solomon Chiu Signed-off-by: Robin Chen Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Move all linux includes into OS types

2022-07-05T20:16:49+00:00

Move all linux includes into OS types. Acked-by: Alan Liu Signed-off-by: Harry Wentland Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Add vrr_active_variable to dc_stream_update

2022-06-15T01:38:41+00:00

[WHY] The display driver on some OSes need to track it in order to perform memory clock switching decisions. [HOW] Propagate the vrr active state to dirty bit so that on mode set it disables dynamic memory clock switching. Acked-by: Alan Liu Signed-off-by: Harry VanZyllDeJong Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Firmware assisted MCLK switch and FS

2022-06-15T01:38:41+00:00

[WHY] Memory clock switching has great potential for power savings. [HOW] The driver code was modified to notify the DMCUB firmware that it should stretch the vertical blank of frames when a memory clock switch is about to start so that no blackouts happen on the screen due to unavailability of the frame buffer. The driver logic to determine when such firmware assisted strategy can be initiated is also implemented and consists on checking prerequisites of the feature. Acked-by: Alan Liu Signed-off-by: Felipe Clark Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: update topology_update_input_v3 struct

2022-06-15T01:38:40+00:00

[Why] DIO parameters were missing in topology_update_intput_v3 struct. [How] Add DIO parameters in v3 struct and update in functions perspectively. Reviewed-by: Bhawanpreet Lakha Acked-by: Hamza Mahfooz Signed-off-by: Qingqing Zhuo Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher