<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpu/drm/amd/display/include, branch linux-6.9.y</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=linux-6.9.y</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=linux-6.9.y'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2024-07-05T07:38:14+00:00</updated>
<entry>
<title>drm/amd/display: Send DP_TOTAL_LTTPR_CNT during detection if LTTPR is present</title>
<updated>2024-07-05T07:38:14+00:00</updated>
<author>
<name>Michael Strauss</name>
<email>michael.strauss@amd.com</email>
</author>
<published>2023-11-28T15:31:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c990344a94208c5bcf32eefc61a74d0cdbade8b7'/>
<id>urn:sha1:c990344a94208c5bcf32eefc61a74d0cdbade8b7</id>
<content type='text'>
commit 2ec6c7f802332d1eff16f03e7c757f1543ee1183 upstream.

[WHY]
New register field added in DP2.1 SCR, needed for auxless ALPM

[HOW]
Echo value read from 0xF0007 back to sink

Reviewed-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Cc: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Signed-off-by: Alex Hung &lt;alex.hung@amd.com&gt;
Signed-off-by: Michael Strauss &lt;michael.strauss@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: add DCN351 version identifiers</title>
<updated>2024-03-04T20:59:07+00:00</updated>
<author>
<name>Hamza Mahfooz</name>
<email>hamza.mahfooz@amd.com</email>
</author>
<published>2024-02-16T20:02:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=1c1a92068d308ed56fac03af9c8149530cb6e973'/>
<id>urn:sha1:1c1a92068d308ed56fac03af9c8149530cb6e973</id>
<content type='text'>
Add DCN3.5.1 ASIC identifiers.

Signed-off-by: Hamza Mahfooz &lt;hamza.mahfooz@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Update FIXED_VS Retimer HWSS Test Pattern Sequences</title>
<updated>2024-02-14T22:13:03+00:00</updated>
<author>
<name>Michael Strauss</name>
<email>michael.strauss@amd.com</email>
</author>
<published>2024-01-12T17:19:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=bb46122db730f42f3fc1d9d511b3d6ebe8375cdd'/>
<id>urn:sha1:bb46122db730f42f3fc1d9d511b3d6ebe8375cdd</id>
<content type='text'>
[WHY]
Need to fix some broken logic and sequencing in initial commit

[HOW]
Fix logic handling override deprogramming when exiting SQ128.

Don't exit early from dp_set_hw_lane_settings for DP2/FIXED_VS case.

Move LTTPR 128b/132b check out of  requires_hwss and check during
runtime, as LTTPR caps are not populated on initial call.

Add pending_test_pattern to link state to allow HWSS to set FFE overrides
on retimer TX and/or skip setting APU TX FFE depending on requested pattern.

Use updated clock source for SQ128 override sequence.

Skip HW FFE preset programming when performing test pattern overrides.

Reviewed-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Acked-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Signed-off-by: Michael Strauss &lt;michael.strauss@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add DP audio BW validation</title>
<updated>2024-01-15T23:35:39+00:00</updated>
<author>
<name>George Shen</name>
<email>george.shen@amd.com</email>
</author>
<published>2023-11-21T23:32:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=12f72a1599dc90b7f698b6a86a477ca4f2ef1f8e'/>
<id>urn:sha1:12f72a1599dc90b7f698b6a86a477ca4f2ef1f8e</id>
<content type='text'>
[Why]
Timings with small HBlank (such as CVT RBv2) can result in insufficient
HBlank bandwidth for audio SDP transmission when DSC is active. This
will cause some higher bandwidth audio modes to fail.

The combination of CVT RBv2 timings + DSC can commonly be encountered
in MST scenarios.

[How]
Add DP audio bandwidth validation for 8b/10b MST and 128b/132b SST/MST
cases and filter out modes that cannot be supported with the current
timing config.

Reviewed-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Acked-by: Alex Hung &lt;alex.hung@amd.com&gt;
Signed-off-by: George Shen &lt;george.shen@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: To adjust dprefclk by down spread percentage</title>
<updated>2024-01-09T20:43:53+00:00</updated>
<author>
<name>Martin Tsai</name>
<email>martin.tsai@amd.com</email>
</author>
<published>2023-12-18T08:36:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=17e74e11ac2b46e7514705ae7abfb93ac0e20bd6'/>
<id>urn:sha1:17e74e11ac2b46e7514705ae7abfb93ac0e20bd6</id>
<content type='text'>
[Why]
Panels show corruption with high refresh rate timings when ssc is
enabled.

[How]
Read down-spread percentage from lut to adjust dprefclk. Issues come
from S0i3 with this commit has been fixed by SMU.

Reviewed-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;rodrigo.siqueira@amd.com&gt;
Signed-off-by: Martin Tsai &lt;martin.tsai@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Move fixpt_from_s3132 to amdgpu_dm</title>
<updated>2024-01-05T21:10:44+00:00</updated>
<author>
<name>Harry Wentland</name>
<email>harry.wentland@amd.com</email>
</author>
<published>2023-12-20T21:25:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=d65e0e91664184299d5e6aaa2f4323e43df9b2c7'/>
<id>urn:sha1:d65e0e91664184299d5e6aaa2f4323e43df9b2c7</id>
<content type='text'>
Other environments don't like the unary minus operator on
an unsigned value.

Signed-off-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: get dprefclk ss info from integration info table</title>
<updated>2023-12-19T19:59:02+00:00</updated>
<author>
<name>Charlene Liu</name>
<email>charlene.liu@amd.com</email>
</author>
<published>2023-12-06T22:14:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=72eaa723187b87f1793529eaadbcfaa836c17812'/>
<id>urn:sha1:72eaa723187b87f1793529eaadbcfaa836c17812</id>
<content type='text'>
[why &amp; how]
we have two SSC_En:
we get ssc_info from dce_info for MPLL_SSC_EN.
we used to call VBIOS cmdtbl's smu_info's SS persentage for DPRECLK SS info,
is used for DP AUDIO and VBIOS' smu_info table was from systemIntegrationInfoTable.

since dcn35 VBIOS removed smu_info, driver need to use integrationInfotable directly.

Reviewed-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Acked-by: Wayne Lin &lt;wayne.lin@amd.com&gt;
Signed-off-by: Charlene Liu &lt;charlene.liu@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: add dc_fixpt_from_s3132 helper</title>
<updated>2023-12-13T21:08:01+00:00</updated>
<author>
<name>Joshua Ashton</name>
<email>joshua@froggi.es</email>
</author>
<published>2023-11-16T19:58:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=889044f9e04f0829dd92640c551941bbe77bc0ea'/>
<id>urn:sha1:889044f9e04f0829dd92640c551941bbe77bc0ea</id>
<content type='text'>
Detach value translation from CTM to reuse it for programming HDR
multiplier property.

Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Joshua Ashton &lt;joshua@froggi.es&gt;
Signed-off-by: Melissa Wen &lt;mwen@igalia.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add missing chips for HDCP</title>
<updated>2023-11-17T14:30:50+00:00</updated>
<author>
<name>Rodrigo Siqueira</name>
<email>Rodrigo.Siqueira@amd.com</email>
</author>
<published>2023-11-07T02:30:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=8a2553d5c7ade00d1b508bbd418d5c4803c12fdd'/>
<id>urn:sha1:8a2553d5c7ade00d1b508bbd418d5c4803c12fdd</id>
<content type='text'>
[WHAT]
Add missing HDCP ID in the message id enum.

Acked-by: Alex Hung &lt;alex.hung@amd.com&gt;
Signed-off-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Revert "drm/amd/display: allow edp updates for virtual signal"</title>
<updated>2023-10-26T22:58:14+00:00</updated>
<author>
<name>Alex Hung</name>
<email>alex.hung@amd.com</email>
</author>
<published>2023-10-03T15:48:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=0604ffead6e5927d2e70698df6bcb1c68690ad0e'/>
<id>urn:sha1:0604ffead6e5927d2e70698df6bcb1c68690ad0e</id>
<content type='text'>
This reverts commit 4ad3ee5ccc77aa3f9d702f7b9ad4d9cfeca6c443.

[WHY &amp; HOW]
Virtual signal is not supported as audio capable by DC.

Reviewed-by: Chao-kai Wang &lt;stylon.wang@amd.com&gt;
Acked-by: Roman Li &lt;roman.li@amd.com&gt;
Signed-off-by: Alex Hung &lt;alex.hung@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
