<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpu/drm/amd/display/dmub/src, branch v6.7</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.7</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.7'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2023-11-29T22:50:27+00:00</updated>
<entry>
<title>drm/amd/display: Include udelay when waiting for INBOX0 ACK</title>
<updated>2023-11-29T22:50:27+00:00</updated>
<author>
<name>Alvin Lee</name>
<email>alvin.lee2@amd.com</email>
</author>
<published>2023-11-06T16:20:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=3c9ea68cb61bd7e5bd312c06a12adada74ff5805'/>
<id>urn:sha1:3c9ea68cb61bd7e5bd312c06a12adada74ff5805</id>
<content type='text'>
When waiting for the ACK for INBOX0 message,
we have to ensure to include the udelay
for proper wait time

Cc: stable@vger.kernel.org # 6.1+
Reviewed-by: Samson Tam &lt;samson.tam@amd.com&gt;
Acked-by: Hamza Mahfooz &lt;hamza.mahfooz@amd.com&gt;
Signed-off-by: Alvin Lee &lt;alvin.lee2@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Change the DMCUB mailbox memory location from FB to inbox</title>
<updated>2023-11-17T05:54:58+00:00</updated>
<author>
<name>Lewis Huang</name>
<email>lewis.huang@amd.com</email>
</author>
<published>2023-10-19T09:22:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=5911d02cac70d7fb52009fbd37423e63f8f6f9bc'/>
<id>urn:sha1:5911d02cac70d7fb52009fbd37423e63f8f6f9bc</id>
<content type='text'>
[WHY]
Flush command sent to DMCUB spends more time for execution on
a dGPU than on an APU. This causes cursor lag when using high
refresh rate mouses.

[HOW]
1. Change the DMCUB mailbox memory location from FB to inbox.
2. Only change windows memory to inbox.

Cc: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Reviewed-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Acked-by: Alex Hung &lt;alex.hung@amd.com&gt;
Signed-off-by: Lewis Huang &lt;lewis.huang@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Guard against invalid RPTR/WPTR being set</title>
<updated>2023-11-17T05:46:01+00:00</updated>
<author>
<name>Nicholas Kazlauskas</name>
<email>nicholas.kazlauskas@amd.com</email>
</author>
<published>2023-09-13T20:18:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=1ffa8602e39b89469dc703ebab7a7e44c33da0f7'/>
<id>urn:sha1:1ffa8602e39b89469dc703ebab7a7e44c33da0f7</id>
<content type='text'>
[WHY]
HW can return invalid values on register read, guard against these being
set and causing us to access memory out of range and page fault.

[HOW]
Guard at sync_inbox1 and guard at pushing commands.

Cc: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Reviewed-by: Hansen Dsouza &lt;hansen.dsouza@amd.com&gt;
Acked-by: Alex Hung &lt;alex.hung@amd.com&gt;
Signed-off-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add a check for idle power optimization</title>
<updated>2023-10-26T22:57:15+00:00</updated>
<author>
<name>Sung Joon Kim</name>
<email>sungkim@amd.com</email>
</author>
<published>2023-09-29T16:12:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=d591284288c29f04e52ae4f3d605e2f39c3e316c'/>
<id>urn:sha1:d591284288c29f04e52ae4f3d605e2f39c3e316c</id>
<content type='text'>
[why]
Need a helper function to check idle power is allowed
so that dc doesn't access any registers that are power-gated.

[how]
Implement helper function to check idle power optimization.
Enable a hook to check if detection is allowed.

V2:
Add function hooks for set and get idle states.
Check if function hook was properly initialized.

Reviewed-by: Aric Cyr &lt;aric.cyr@amd.com&gt;
Reviewed-by: Nicholas Choi &lt;nicholas.choi@amd.com&gt;
Acked-by: Roman Li &lt;roman.li@amd.com&gt;
Signed-off-by: Sung Joon Kim &lt;sungkim@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add missing copyright notice in DMUB</title>
<updated>2023-10-26T22:41:22+00:00</updated>
<author>
<name>Stylon Wang</name>
<email>stylon.wang@amd.com</email>
</author>
<published>2023-10-19T14:43:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=b258a4d5b383f0c087dd231dee2662126f3d0d83'/>
<id>urn:sha1:b258a4d5b383f0c087dd231dee2662126f3d0d83</id>
<content type='text'>
[Why &amp; How]
Add missing/incomplete copyright notice in DMUB files

Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Stylon Wang &lt;stylon.wang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Revert "drm/amd/display: Add a check for idle power optimization"</title>
<updated>2023-10-09T20:59:23+00:00</updated>
<author>
<name>Sung Joon Kim</name>
<email>sungkim@amd.com</email>
</author>
<published>2023-09-28T15:20:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=d0a767f7b8e2cb9302f36afe6a4e535bc234b667'/>
<id>urn:sha1:d0a767f7b8e2cb9302f36afe6a4e535bc234b667</id>
<content type='text'>
Revert commit 434cf7af492f ("drm/amd/display: Add a check for idle power optimization")
Because it cause Freesync and S4 regression

Reviewed-by: Aric Cyr &lt;aric.cyr@amd.com&gt;
Acked-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Signed-off-by: Sung Joon Kim &lt;sungkim@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add a check for idle power optimization</title>
<updated>2023-10-04T22:42:17+00:00</updated>
<author>
<name>Sung Joon Kim</name>
<email>Sungjoon.Kim@amd.com</email>
</author>
<published>2023-09-24T16:34:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=434cf7af492fcacf7ca93c05e0bafd266b2e7cbb'/>
<id>urn:sha1:434cf7af492fcacf7ca93c05e0bafd266b2e7cbb</id>
<content type='text'>
[why]
Need a helper function to check idle power is allowed
so that dc doesn't access any registers that are power-gated.

[how]
Implement helper function to check idle power optimization.
Enable a hook to check if detection is allowed.

Signed-off-by: Sung Joon Kim &lt;Sungjoon.Kim@amd.com&gt;
Acked-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Reviewed-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: clean up one inconsistent indenting</title>
<updated>2023-09-06T18:33:05+00:00</updated>
<author>
<name>Yang Li</name>
<email>yang.lee@linux.alibaba.com</email>
</author>
<published>2023-09-01T01:29:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=1bb5ed6ffcff2d7e20503d78d1ab120b8bae094f'/>
<id>urn:sha1:1bb5ed6ffcff2d7e20503d78d1ab120b8bae094f</id>
<content type='text'>
drivers/gpu/drm/amd/amdgpu/../display/dmub/src/dmub_srv.c:355 dmub_srv_hw_setup() warn: inconsistent indenting

Signed-off-by: Yang Li &lt;yang.lee@linux.alibaba.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add DCN35 DMUB</title>
<updated>2023-08-30T19:51:15+00:00</updated>
<author>
<name>Qingqing Zhuo</name>
<email>Qingqing.Zhuo@amd.com</email>
</author>
<published>2023-08-03T04:32:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=65138eb72e1fc687be49932b9a45325598ffa01c'/>
<id>urn:sha1:65138eb72e1fc687be49932b9a45325598ffa01c</id>
<content type='text'>
[Why &amp; How]
Add DMUB handling for DCN35.

Signed-off-by: Qingqing Zhuo &lt;Qingqing.Zhuo@amd.com&gt;
Acked-by: Harry Wentland &lt;Harry.Wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Skip dmub memory flush when not needed</title>
<updated>2023-08-30T19:37:18+00:00</updated>
<author>
<name>Dillon Varone</name>
<email>dillon.varone@amd.com</email>
</author>
<published>2023-08-04T20:55:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=5e77c339a291776b88dcf1dd3e18955d0341dd5d'/>
<id>urn:sha1:5e77c339a291776b88dcf1dd3e18955d0341dd5d</id>
<content type='text'>
[WHY&amp;HOW]
Readback is only necessary when loaded via CPU.

Reviewed-by: Chris Park &lt;chris.park@amd.com&gt;
Acked-by: Hamza Mahfooz &lt;hamza.mahfooz@amd.com&gt;
Signed-off-by: Dillon Varone &lt;dillon.varone@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
