<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpu/drm/amd/display/dmub/inc, branch v6.3</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.3</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.3'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2023-02-16T03:24:56+00:00</updated>
<entry>
<title>drm/amd/display: avoid unaligned access warnings</title>
<updated>2023-02-16T03:24:56+00:00</updated>
<author>
<name>Jonathan Gray</name>
<email>jsg@jsg.id.au</email>
</author>
<published>2023-02-14T06:49:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6e60cba666831e148d24b0aed783e1eb5bf99ff4'/>
<id>urn:sha1:6e60cba666831e148d24b0aed783e1eb5bf99ff4</id>
<content type='text'>
When building on OpenBSD/arm64 with clang 15, unaligned access
warnings are seen when a union is embedded inside a packed struct.

drm/amd/display/dmub/inc/dmub_cmd.h:941:18: error: field
  cursor_copy_src within 'struct dmub_rb_cmd_mall' is less aligned than
  'union dmub_addr' and is usually due to 'struct dmub_rb_cmd_mall'
  being packed, which can lead to unaligned accesses
  [-Werror,-Wunaligned-access]
        union dmub_addr cursor_copy_src; /**&lt; Cursor copy address */
                        ^
drm/amd/display/dmub/inc/dmub_cmd.h:942:18: error: field cursor_copy_dst
  within 'struct dmub_rb_cmd_mall' is less aligned than
  'union dmub_addr' and is usually due to 'struct dmub_rb_cmd_mall'
  being packed, which can lead to unaligned accesses
  [-Werror,-Wunaligned-access]
        union dmub_addr cursor_copy_dst; /**&lt; Cursor copy destination */
                        ^

Add pragma pack around dmub_addr to avoid this.

Signed-off-by: Jonathan Gray &lt;jsg@jsg.id.au&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: temporary fix for page faulting</title>
<updated>2023-02-16T03:21:07+00:00</updated>
<author>
<name>Ayush Gupta</name>
<email>ayugupta@amd.com</email>
</author>
<published>2023-02-03T17:39:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=d2994b25e0787eabf7477ccb17b62c7f680809fa'/>
<id>urn:sha1:d2994b25e0787eabf7477ccb17b62c7f680809fa</id>
<content type='text'>
This reverts a part of the
commit 826e7ffaf079c72607bf3199d4e19730eaf8ca00
 ("drm/amd/display: [FW Promotion] Release 0.0.153.0")

Reviewed-by: Nicholas Kazlauskas &lt;Nicholas.Kazlauskas@amd.com&gt;
Acked-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Signed-off-by: Ayush Gupta&lt;ayugupta@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Move DCN314 DOMAIN power control to DMCUB</title>
<updated>2023-02-14T20:47:20+00:00</updated>
<author>
<name>Nicholas Kazlauskas</name>
<email>nicholas.kazlauskas@amd.com</email>
</author>
<published>2023-01-23T19:59:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=e383b12709e32d6494c948422070c2464b637e44'/>
<id>urn:sha1:e383b12709e32d6494c948422070c2464b637e44</id>
<content type='text'>
[Why]
DOMAIN power gating control is now required to be done via firmware
due to interlock with other power features. This is to avoid
intermittent issues in the LB memories.

[How]
If the firmware supports the command then use the new firmware as
the sequence can avoid potential display corruption issues.

The command will be ignored on firmware that does not support DOMAIN
power control and the pipes will remain always on - frequent PG cycling
can cause the issue to occur on the old sequence, so we should avoid it.

Reviewed-by: Hansen Dsouza &lt;hansen.dsouza@amd.com&gt;
Acked-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Signed-off-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: [FW Promotion] Release 0.0.153.0</title>
<updated>2023-02-08T22:16:21+00:00</updated>
<author>
<name>Anthony Koo</name>
<email>Anthony.Koo@amd.com</email>
</author>
<published>2023-01-27T16:55:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=826e7ffaf079c72607bf3199d4e19730eaf8ca00'/>
<id>urn:sha1:826e7ffaf079c72607bf3199d4e19730eaf8ca00</id>
<content type='text'>
[Why&amp;How]
- Reduce reserved size from 9 to 8 dwords to reduce structure size
and allow the union dmub_rb_cmd to fit into max 64-bytes cmd size

Reviewed-by: Aric Cyr &lt;Aric.Cyr@amd.com&gt;
Acked-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Signed-off-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Pass DSC slice height to PSR FW</title>
<updated>2023-01-24T18:26:25+00:00</updated>
<author>
<name>Robin Chen</name>
<email>robin.chen@amd.com</email>
</author>
<published>2023-01-10T08:53:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c84ff24a77fa66aaf7c591cdf806456dcb5c2fcd'/>
<id>urn:sha1:c84ff24a77fa66aaf7c591cdf806456dcb5c2fcd</id>
<content type='text'>
[Why]
When DSC is enabled, the PSRSU seletive update region
must be multiple number of DSC slice height number.
The original solution is to overwrite the SU Y granularity
by DSC slice height in DAL driver. However, the size
of the SU Y granularity variable only has 8 bytes
and the DSC slice height may over the 8 bytes size.

[How]
Instead of overwriting the SU Y granularity value,
add a new DSC slice height pararmeter and pass it
to DMUB PSRSU FW. The PSRSU FW will refer to the
DSC slice height value and extend the SU region.

Reviewed-by: Dennis Chan &lt;dennis.chan@amd.com&gt;
Reviewed-by: ChunTao Tso &lt;chuntao.tso@amd.com&gt;
Acked-by: Alan Liu &lt;HaoPing.Liu@amd.com&gt;
Signed-off-by: Robin Chen &lt;robin.chen@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: [FW Promotion] Release 0.0.150.0</title>
<updated>2023-01-24T18:26:24+00:00</updated>
<author>
<name>Anthony Koo</name>
<email>Anthony.Koo@amd.com</email>
</author>
<published>2023-01-08T04:20:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=0888aa30bb6ed6d5f7a718aa0d722d2f75c48d7a'/>
<id>urn:sha1:0888aa30bb6ed6d5f7a718aa0d722d2f75c48d7a</id>
<content type='text'>
 - Add comments to reserved bit

Reviewed-by: Aric Cyr &lt;Aric.Cyr@amd.com&gt;
Acked-by: Alan Liu &lt;HaoPing.Liu@amd.com&gt;
Signed-off-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Skip backlight control delay on external powered links</title>
<updated>2023-01-17T20:40:28+00:00</updated>
<author>
<name>Tony Tascioglu</name>
<email>tony.tascioglu@amd.com</email>
</author>
<published>2022-12-12T15:20:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=e0886e1fa53d0c705ff14df14769ddcc6e0a20ca'/>
<id>urn:sha1:e0886e1fa53d0c705ff14df14769ddcc6e0a20ca</id>
<content type='text'>
[Why]
When an eDP panel is powered externally from a different GPU, we can avoid
waiting for hardware sequencing delays when switching the backlight on/off
as the display backlight is no longer powered by the original source.

[How]
This commit extends the 'link_powered_externally' variable to allow
bypassing hardware delays for additional backlight commands and force the
backlight on/off when a link is powered by another GPU.

Tested-by: Daniel Wheeler &lt;Daniel.Wheeler@amd.com&gt;
Reviewed-by: Felipe Clark &lt;felipe.clark@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Tony Tascioglu &lt;tony.tascioglu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Optimize link power-down when link powered externally</title>
<updated>2023-01-17T20:39:39+00:00</updated>
<author>
<name>Tony Tascioglu</name>
<email>tony.tascioglu@amd.com</email>
</author>
<published>2022-11-25T22:31:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=3351ce5d8cad587b37a2289ce96153e3873110fb'/>
<id>urn:sha1:3351ce5d8cad587b37a2289ce96153e3873110fb</id>
<content type='text'>
[Why]
When an eDP panel is powered externally by a different GPU, we don't need
to wait for hardware sequencing delays when powering down a link, as the
display is not dependent on the GPU being powered down.

[How]
This commit adds a variable 'link_powered_externally' to indicate when a
link is being powered by another GPU.

Tested-by: Daniel Wheeler &lt;Daniel.Wheeler@amd.com&gt;
Reviewed-by: Felipe Clark &lt;felipe.clark@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Tony Tascioglu &lt;tony.tascioglu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Update dmub header to match DMUB</title>
<updated>2023-01-13T19:59:41+00:00</updated>
<author>
<name>Mustapha Ghaddar</name>
<email>mghaddar@amd.com</email>
</author>
<published>2022-12-12T19:30:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=8af54c61ccec875473e0636934ee578fa23fceb1'/>
<id>urn:sha1:8af54c61ccec875473e0636934ee578fa23fceb1</id>
<content type='text'>
[WHY]
Last PR missed name of a struct to match in DMUB

[HOW]
Update the logic in dmub_cmh.h header

Tested-by: Daniel Wheeler &lt;Daniel.Wheeler@amd.com&gt;
Reviewed-by: Meenakshikumar Somasundaram &lt;Meenakshikumar.Somasundaram@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Mustapha Ghaddar &lt;mghaddar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add DPIA NOTIFICATION logic</title>
<updated>2022-12-15T17:18:18+00:00</updated>
<author>
<name>Mustapha Ghaddar</name>
<email>mghaddar@amd.com</email>
</author>
<published>2022-12-01T18:00:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=669018a9929c61cb14ea374ee93df24242a7794d'/>
<id>urn:sha1:669018a9929c61cb14ea374ee93df24242a7794d</id>
<content type='text'>
[WHY]
Adding the new DPIA NOTIFY packets from DMUB
As per the design with Cruise to account for
250ms response delay otherwise

[HOW]
Added th DPIA NOTIFY logic as per DMUB logic

Reviewed-by: Nicholas Kazlauskas &lt;Nicholas.Kazlauskas@amd.com&gt;
Acked-by: Jasdeep Dhillon &lt;jdhillon@amd.com&gt;
Signed-off-by: Mustapha Ghaddar &lt;mghaddar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
