<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpu/drm/amd/display/dc/link, branch linux-6.9.y</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=linux-6.9.y</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=linux-6.9.y'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2024-07-05T07:38:14+00:00</updated>
<entry>
<title>drm/amd/display: Send DP_TOTAL_LTTPR_CNT during detection if LTTPR is present</title>
<updated>2024-07-05T07:38:14+00:00</updated>
<author>
<name>Michael Strauss</name>
<email>michael.strauss@amd.com</email>
</author>
<published>2023-11-28T15:31:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c990344a94208c5bcf32eefc61a74d0cdbade8b7'/>
<id>urn:sha1:c990344a94208c5bcf32eefc61a74d0cdbade8b7</id>
<content type='text'>
commit 2ec6c7f802332d1eff16f03e7c757f1543ee1183 upstream.

[WHY]
New register field added in DP2.1 SCR, needed for auxless ALPM

[HOW]
Echo value read from 0xF0007 back to sink

Reviewed-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Cc: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Signed-off-by: Alex Hung &lt;alex.hung@amd.com&gt;
Signed-off-by: Michael Strauss &lt;michael.strauss@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Allocate zero bw after bw alloc enable</title>
<updated>2024-05-01T01:37:21+00:00</updated>
<author>
<name>Meenakshikumar Somasundaram</name>
<email>meenakshikumar.somasundaram@amd.com</email>
</author>
<published>2024-04-10T14:46:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=46fe9cb1a9e62f4e6229f48ae303ef8e6c1fdc64'/>
<id>urn:sha1:46fe9cb1a9e62f4e6229f48ae303ef8e6c1fdc64</id>
<content type='text'>
[Why]
During DP tunnel creation, CM preallocates BW and reduces
estimated BW of other DPIA. CM release preallocation only
when allocation is complete. Display mode validation logic
validates timings based on bw available per host router.
In multi display setup, this causes bw allocation failure
when allocation greater than estimated bw.

[How]
Do zero alloc to make the CM to release preallocation and
update estimated BW correctly for all DPIAs per host router.

Reviewed-by: PeiChen Huang &lt;peichen.huang@amd.com&gt;
Acked-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Signed-off-by: Meenakshikumar Somasundaram &lt;meenakshikumar.somasundaram@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Amend coasting vtotal for replay low hz</title>
<updated>2024-03-20T17:12:58+00:00</updated>
<author>
<name>ChunTao Tso</name>
<email>chuntao.tso@amd.com</email>
</author>
<published>2024-02-20T09:08:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=8e054b0f1e71531762b8ded7f66c1b4af734671b'/>
<id>urn:sha1:8e054b0f1e71531762b8ded7f66c1b4af734671b</id>
<content type='text'>
[WHY]
The original coasting vtotal is 2 bytes, and it need to
be amended to 4 bytes because low hz case.

[HOW]
Amend coasting vtotal from 2 bytes to 4 bytes.

Cc: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Reviewed-by: Alvin Lee &lt;alvin.lee2@amd.com&gt;
Acked-by: Alex Hung &lt;alex.hung@amd.com&gt;
Signed-off-by: ChunTao Tso &lt;chuntao.tso@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Use kcalloc() instead of kzalloc()</title>
<updated>2024-02-22T15:28:32+00:00</updated>
<author>
<name>Lenko Donchev</name>
<email>lenko.donchev@gmail.com</email>
</author>
<published>2024-01-28T09:04:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=f634ee1737e7b856bd4c3f040af867007d1cb7b8'/>
<id>urn:sha1:f634ee1737e7b856bd4c3f040af867007d1cb7b8</id>
<content type='text'>
We are trying to get rid of all multiplications from allocation
functions to prevent integer overflows. Here the multiplication is
obviously safe, but using kcalloc() is more appropriate and improves
readability. This patch has no effect on runtime behavior.

Link: https://www.kernel.org/doc/html/next/process/deprecated.html#open-coded-arithmetic-in-allocator-arguments
Link: https://github.com/KSPP/linux/issues/162

Reviewed-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Lenko Donchev &lt;lenko.donchev@gmail.com&gt;
Signed-off-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Only allow dig mapping to pwrseq in new asic</title>
<updated>2024-02-22T15:17:52+00:00</updated>
<author>
<name>Lewis Huang</name>
<email>lewis.huang@amd.com</email>
</author>
<published>2024-01-31T09:20:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=4af4d2c275aeb667bc2bca0d2135b825e931a55a'/>
<id>urn:sha1:4af4d2c275aeb667bc2bca0d2135b825e931a55a</id>
<content type='text'>
[Why]
The old asic only have 1 pwrseq hw.
We don't need to map the diginst to pwrseq inst in old asic.

[How]
1. Only mapping dig to pwrseq for new asic.
2. Move mapping function into dcn specific panel control component

Cc: Stable &lt;stable@vger.kernel.org&gt; # v6.6+
Cc: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/3122
Reviewed-by: Anthony Koo &lt;anthony.koo@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;rodrigo.siqueira@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Lewis Huang &lt;lewis.huang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add 'replay' NULL check in 'edp_set_replay_allow_active()'</title>
<updated>2024-02-16T20:43:51+00:00</updated>
<author>
<name>Srinivasan Shanmugam</name>
<email>srinivasan.shanmugam@amd.com</email>
</author>
<published>2024-02-15T13:08:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=f6aed043ee5d75b3d1bfc452b1a9584b63c8f76b'/>
<id>urn:sha1:f6aed043ee5d75b3d1bfc452b1a9584b63c8f76b</id>
<content type='text'>
In the first if statement, we're checking if 'replay' is NULL. But in
the second if statement, we're not checking if 'replay' is NULL again
before calling replay-&gt;funcs-&gt;replay_set_power_opt().

if (replay == NULL &amp;&amp; force_static)
    return false;

...

if (link-&gt;replay_settings.replay_feature_enabled &amp;&amp;
    replay-&gt;funcs-&gt;replay_set_power_opt) {
	replay-&gt;funcs-&gt;replay_set_power_opt(replay, *power_opts, panel_inst);
	link-&gt;replay_settings.replay_power_opt_active = *power_opts;
}

If 'replay' is NULL, this will cause a null pointer dereference.

Fixes the below found by smatch:
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_edp_panel_control.c:895 edp_set_replay_allow_active() error: we previously assumed 'replay' could be null (see line 887)

Fixes: c7ddc0a800bc ("drm/amd/display: Add Functions to enable Freesync Panel Replay")
Cc: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Cc: Roman Li &lt;roman.li@amd.com&gt;
Cc: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Cc: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Cc: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Suggested-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Signed-off-by: Srinivasan Shanmugam &lt;srinivasan.shanmugam@amd.com&gt;
Reviewed-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: fixed integer types and null check locations</title>
<updated>2024-02-14T22:13:28+00:00</updated>
<author>
<name>Sohaib Nadeem</name>
<email>sohaib.nadeem@amd.com</email>
</author>
<published>2024-01-31T21:40:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=616b39467e816851335277d817ec98b7a9b92758'/>
<id>urn:sha1:616b39467e816851335277d817ec98b7a9b92758</id>
<content type='text'>
[why]:
issues fixed:
- comparison with wider integer type in loop condition which can cause
infinite loops
- pointer dereference before null check

Cc: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Reviewed-by: Josip Pavic &lt;josip.pavic@amd.com&gt;
Acked-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Signed-off-by: Sohaib Nadeem &lt;sohaib.nadeem@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Update FIXED_VS Retimer HWSS Test Pattern Sequences</title>
<updated>2024-02-14T22:13:03+00:00</updated>
<author>
<name>Michael Strauss</name>
<email>michael.strauss@amd.com</email>
</author>
<published>2024-01-12T17:19:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=bb46122db730f42f3fc1d9d511b3d6ebe8375cdd'/>
<id>urn:sha1:bb46122db730f42f3fc1d9d511b3d6ebe8375cdd</id>
<content type='text'>
[WHY]
Need to fix some broken logic and sequencing in initial commit

[HOW]
Fix logic handling override deprogramming when exiting SQ128.

Don't exit early from dp_set_hw_lane_settings for DP2/FIXED_VS case.

Move LTTPR 128b/132b check out of  requires_hwss and check during
runtime, as LTTPR caps are not populated on initial call.

Add pending_test_pattern to link state to allow HWSS to set FFE overrides
on retimer TX and/or skip setting APU TX FFE depending on requested pattern.

Use updated clock source for SQ128 override sequence.

Skip HW FFE preset programming when performing test pattern overrides.

Reviewed-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Acked-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Signed-off-by: Michael Strauss &lt;michael.strauss@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add align done check</title>
<updated>2024-02-14T22:08:51+00:00</updated>
<author>
<name>Zhikai Zhai</name>
<email>zhikai.zhai@amd.com</email>
</author>
<published>2024-01-29T09:02:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=1b5078f01b953a43d6198180ca5b110017315672'/>
<id>urn:sha1:1b5078f01b953a43d6198180ca5b110017315672</id>
<content type='text'>
[WHY]
We Double-check link status if training successful,
but miss the lane align status.

[HOW]
Add the lane align status check

Cc: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Reviewed-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Acked-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Signed-off-by: Zhikai Zhai &lt;zhikai.zhai@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Initialize 'wait_time_microsec' variable in link_dp_training_dpia.c</title>
<updated>2024-02-12T21:12:10+00:00</updated>
<author>
<name>Srinivasan Shanmugam</name>
<email>srinivasan.shanmugam@amd.com</email>
</author>
<published>2024-02-05T10:37:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=8abf2636f68cc8fa4c8f6dd1226148f3369edc80'/>
<id>urn:sha1:8abf2636f68cc8fa4c8f6dd1226148f3369edc80</id>
<content type='text'>
wait_time_microsec = max(wait_time_microsec, (uint32_t)
DPIA_CLK_SYNC_DELAY);

Above line is trying to assign the maximum value between
'wait_time_microsec' and 'DPIA_CLK_SYNC_DELAY' to wait_time_microsec.
However, 'wait_time_microsec' has not been assigned a value before this
line, initialize 'wait_time_microsec' at the point of declaration.

Fixes the below:
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_training_dpia.c:697 dpia_training_eq_non_transparent() error: uninitialized symbol 'wait_time_microsec'.

Fixes: 630168a97314 ("drm/amd/display: move dp link training logic to link_dp_training")
Cc: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Cc: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Cc: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Signed-off-by: Srinivasan Shanmugam &lt;srinivasan.shanmugam@amd.com&gt;
Reviewed-by: Roman Li &lt;roman.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
