<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpu/drm/amd/display/dc/dsc, branch v6.6.150</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.6.150</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.6.150'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2024-10-04T14:29:47+00:00</updated>
<entry>
<title>drm/amd/display: Add HDMI DSC native YCbCr422 support</title>
<updated>2024-10-04T14:29:47+00:00</updated>
<author>
<name>Leo Ma</name>
<email>hanghong.ma@amd.com</email>
</author>
<published>2024-08-19T17:25:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=55fcbe5f60865717479a9d6a8d8d076c8f443759'/>
<id>urn:sha1:55fcbe5f60865717479a9d6a8d8d076c8f443759</id>
<content type='text'>
commit 07bfa9cdbf3cd2daadfaaba0601f126f45951ffa upstream.

[WHY &amp;&amp; HOW]
For some HDMI OVT timing, YCbCr422 encoding fails at the DSC
bandwidth check. The root cause is our DSC policy for timing
doesn't account for HDMI YCbCr422 native support.

Cc: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Reviewed-by: Chris Park &lt;chris.park@amd.com&gt;
Signed-off-by: Leo Ma &lt;hanghong.ma@amd.com&gt;
Signed-off-by: Alex Hung &lt;alex.hung@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix division by zero in setup_dsc_config</title>
<updated>2024-05-25T14:22:52+00:00</updated>
<author>
<name>Jose Fernandez</name>
<email>josef@netflix.com</email>
</author>
<published>2024-04-22T14:35:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=7e4f50dfc98c49b3dc6875a35c3112522fb25639'/>
<id>urn:sha1:7e4f50dfc98c49b3dc6875a35c3112522fb25639</id>
<content type='text'>
commit 130afc8a886183a94cf6eab7d24f300014ff87ba upstream.

When slice_height is 0, the division by slice_height in the calculation
of the number of slices will cause a division by zero driver crash. This
leaves the kernel in a state that requires a reboot. This patch adds a
check to avoid the division by zero.

The stack trace below is for the 6.8.4 Kernel. I reproduced the issue on
a Z16 Gen 2 Lenovo Thinkpad with a Apple Studio Display monitor
connected via Thunderbolt. The amdgpu driver crashed with this exception
when I rebooted the system with the monitor connected.

kernel: ? die (arch/x86/kernel/dumpstack.c:421 arch/x86/kernel/dumpstack.c:434 arch/x86/kernel/dumpstack.c:447)
kernel: ? do_trap (arch/x86/kernel/traps.c:113 arch/x86/kernel/traps.c:154)
kernel: ? setup_dsc_config (drivers/gpu/drm/amd/amdgpu/../display/dc/dsc/dc_dsc.c:1053) amdgpu
kernel: ? do_error_trap (./arch/x86/include/asm/traps.h:58 arch/x86/kernel/traps.c:175)
kernel: ? setup_dsc_config (drivers/gpu/drm/amd/amdgpu/../display/dc/dsc/dc_dsc.c:1053) amdgpu
kernel: ? exc_divide_error (arch/x86/kernel/traps.c:194 (discriminator 2))
kernel: ? setup_dsc_config (drivers/gpu/drm/amd/amdgpu/../display/dc/dsc/dc_dsc.c:1053) amdgpu
kernel: ? asm_exc_divide_error (./arch/x86/include/asm/idtentry.h:548)
kernel: ? setup_dsc_config (drivers/gpu/drm/amd/amdgpu/../display/dc/dsc/dc_dsc.c:1053) amdgpu
kernel: dc_dsc_compute_config (drivers/gpu/drm/amd/amdgpu/../display/dc/dsc/dc_dsc.c:1109) amdgpu

After applying this patch, the driver no longer crashes when the monitor
is connected and the system is rebooted. I believe this is the same
issue reported for 3113.

Reviewed-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Jose Fernandez &lt;josef@netflix.com&gt;
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3113
Signed-off-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: "Limonciello, Mario" &lt;mario.limonciello@amd.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add link encoding to timing BW calculation parameters</title>
<updated>2023-07-18T15:15:51+00:00</updated>
<author>
<name>George Shen</name>
<email>george.shen@amd.com</email>
</author>
<published>2023-06-17T02:35:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=63c0bf99c1d020a744eff286d65b33e2960d9d6b'/>
<id>urn:sha1:63c0bf99c1d020a744eff286d65b33e2960d9d6b</id>
<content type='text'>
[Why]
There certain cases where the timing BW is dependent on the type of link
encoding in use. Thus to calculate the correct BW required for a given
timing, the link encoding should be added as a parameter.

Reviewed-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Acked-by: Alan Liu &lt;haoping.liu@amd.com&gt;
Signed-off-by: George Shen &lt;george.shen@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add stream overhead in BW calculations for 128b/132b</title>
<updated>2023-07-18T15:15:45+00:00</updated>
<author>
<name>George Shen</name>
<email>george.shen@amd.com</email>
</author>
<published>2023-04-11T00:00:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=974764180838516f80a13257da67a1ec6afb87d4'/>
<id>urn:sha1:974764180838516f80a13257da67a1ec6afb87d4</id>
<content type='text'>
[Why]
Current BW calculations do not account for the additional padding added
for uncompressed pixel-to-symbol packing.

This results in X.Y being too low for 128b/132b SST streams in certain
scenarios. If X.Y is too low, end user can observe image corruption.

[How]
Add function to calculate stream overhead to timing BW calculation for
128b/132b SST cases.

Reviewed-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Acked-by: Alan Liu &lt;haoping.liu@amd.com&gt;
Signed-off-by: George Shen &lt;george.shen@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: drop redundant memset() in get_available_dsc_slices()</title>
<updated>2023-06-09T14:38:37+00:00</updated>
<author>
<name>Hamza Mahfooz</name>
<email>hamza.mahfooz@amd.com</email>
</author>
<published>2023-05-17T17:31:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=48dd83c0fb6c68742f7fefca907036942dd358be'/>
<id>urn:sha1:48dd83c0fb6c68742f7fefca907036942dd358be</id>
<content type='text'>
get_available_dsc_slices() returns the number of indices set, and all of
the users of get_available_dsc_slices() don't cross the returned bound
when iterating over available_slices[]. So, the memset() in
get_available_dsc_slices() is redundant and can be dropped.

Fixes: 97bda0322b8a ("drm/amd/display: Add DSC support for Navi (v2)")
Reported-by: Christophe JAILLET &lt;christophe.jaillet@wanadoo.fr&gt;
Reviewed-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Hamza Mahfooz &lt;hamza.mahfooz@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: DSC policy override when ODM combine is forced</title>
<updated>2023-04-18T20:28:52+00:00</updated>
<author>
<name>Nasir Osman</name>
<email>nasir.osman@amd.com</email>
</author>
<published>2023-03-30T19:08:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6bfe9a23a8d6c7292d520747859a515fd429518d'/>
<id>urn:sha1:6bfe9a23a8d6c7292d520747859a515fd429518d</id>
<content type='text'>
[why]
When we force ODM combine with DSC, we lose several
8 bit and 10 bit modes in validation and thus
not able to use HDR. This is due to the number of
horizontal slices used in DSC not properly being
accounted for currently when 2:1 ODM Combine is forced.

[how]
Enforce at least two horizontal slices are used for DSC when
ODM combine is forced.

Reviewed-by: Nicholas Kazlauskas &lt;Nicholas.Kazlauskas@amd.com&gt;
Acked-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Signed-off-by: Nasir Osman &lt;nasir.osman@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: convert link.h functions to function pointer style</title>
<updated>2023-03-14T19:35:03+00:00</updated>
<author>
<name>Wenjing Liu</name>
<email>wenjing.liu@amd.com</email>
</author>
<published>2023-02-23T22:04:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=98ce7d32e2154a6676d4dc7e6877af68cebf8832'/>
<id>urn:sha1:98ce7d32e2154a6676d4dc7e6877af68cebf8832</id>
<content type='text'>
[Why &amp; How]
All dc subcomponents should call another dc component via function pointers
stored in a component structure. This is part of dc coding convention since
the beginning. The reason behind this is to improve encapsulation and
polymorphism. The function contract is extracted into a single link service
structure defined in link.h header file and implemented only in link_factory.c instead
of spreading across multiple files in link component file structure.

Reviewed-by: Jun Lei &lt;Jun.Lei@amd.com&gt;
Acked-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Signed-off-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Rename DCN config to FP</title>
<updated>2023-03-07T19:22:40+00:00</updated>
<author>
<name>Harry Wentland</name>
<email>harry.wentland@amd.com</email>
</author>
<published>2023-02-14T19:14:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=4652ae7a51b78d7607c247228ac2a14fa0088bbf'/>
<id>urn:sha1:4652ae7a51b78d7607c247228ac2a14fa0088bbf</id>
<content type='text'>
[Why &amp; How]
The only reason we have the DCN config is for
floating point support. Rename it to make that
clear and (hopefully) avoid misuse of the config
in the future.

Reviewed-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Acked-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Signed-off-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Build DSC without DCN config</title>
<updated>2023-03-07T19:22:40+00:00</updated>
<author>
<name>Harry Wentland</name>
<email>harry.wentland@amd.com</email>
</author>
<published>2023-02-13T20:29:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=84c03df58d8bbf77feb2f199f10dbe8f7f72c782'/>
<id>urn:sha1:84c03df58d8bbf77feb2f199f10dbe8f7f72c782</id>
<content type='text'>
[Why &amp; How]
DSC needs DCN but we are trying reduce the usage of the
DCN flag. It's easier to build the DSC code sprinkled
around DC core and the DMs and just guard the place where
DSC uses floating point code.

Since DSC is never enabled on non-DCN ASICs this won't
have any effect.

Reviewed-by: Hamza Mahfooz &lt;Hamza.Mahfooz@amd.com&gt;
Acked-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Signed-off-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: fix typo in dc_dsc_config_options structure</title>
<updated>2023-03-07T19:22:39+00:00</updated>
<author>
<name>Mike Hsieh</name>
<email>Mike.Hsieh@amd.com</email>
</author>
<published>2023-02-20T03:48:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=ab487ea8910d2a84f851cb87f2cb49adcb5b774b'/>
<id>urn:sha1:ab487ea8910d2a84f851cb87f2cb49adcb5b774b</id>
<content type='text'>
[WHY]
There is a typo in dc_dsc_config_options structure

[HOW]
Fix the typo

Reviewed-by: Wenjing Liu &lt;Wenjing.Liu@amd.com&gt;
Acked-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Signed-off-by: Mike Hsieh &lt;Mike.Hsieh@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
