kernel/linux.git/drivers/gpu/drm/amd/display/dc/dpp, branch master

drm/amd/display: Remove unused NUM_ELEMENTS macros

2026-04-03T18:04:49+00:00

Removes unused NUM_ELEMENTS macros. Discovered while removing cases where ARRAY_SIZE from the header can be used. This also aligns with the array_size.cocci coccinelle check. Suggested-by: Robert P. J. Day Signed-off-by: Linus Probert Signed-off-by: Alex Deucher

drm/amd/display: Fixed Silence complier warnings in dc

2026-03-30T19:12:15+00:00

[Why] Resolve compiler warnings by marking unused parameters explicitly. [How] In .c and .h function definitions, keep parameter names in signatures and add a line with `(void)param;` in function body Preserved function signatures and avoids breaking code paths that may reference the parameter under conditional compilation. Reviewed-by: Dillon Varone Reviewed-by: Austin Zheng Signed-off-by: Gaghik Khachatrian Signed-off-by: Chuanyu Tseng Signed-off-by: Alex Deucher

drm/amd/display: Rename enum 'pixel_format' to 'dc_pixel_format'

2026-03-23T18:19:14+00:00

Rename the enum 'pixel_format' to 'dc_pixel_format' to avoid potential name conflicts with the pixel_format struct defined in include/video/pixel_format.h. Signed-off-by: Hou Wenlong Reviewed-by: Alex Hung Signed-off-by: Alex Deucher

drm/amd/display: Sync dcn42 with DC 3.2.373

2026-03-11T17:58:07+00:00

This patch provides a bulk merge to align driver support for DCN42 with Display Core version 3.2.373. It includes upgrade for: - clk_mgr - dml2/dml21 - optc - hubp - mpc - optc - hwseq Acked-by: Aurabindo Pillai Signed-off-by: Roman Li Signed-off-by: Alex Hung Tested-by: Dan Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Set chroma taps to 1 if luma taps are 1

2026-03-11T14:53:32+00:00

When luma is unscaled we also want chroma to be pixel-perfect. When luma taps are > 1 the result will be a blurred luma plane, even when the image isn't scaled. This makes IGT tests for CSC colorop pass. Assisted-by: Claude: claude-sonnet-4.5 Reviewed-by: Alex Hung Signed-off-by: Harry Wentland Signed-off-by: Alex Hung Tested-by: Dan Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Remove always-false branches

2026-03-02T21:39:18+00:00

[WHAT] program_prealpha_dealpha and hpo_frl_stream_enc_acquired are always false and all branches depending on them will never be taken. This is reported as DEADCODE errors by Coverity. Reviewed-by: Roman Li Signed-off-by: Alex Hung Tested-by: Dan Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Enable dcn42 DC

2026-02-23T19:28:33+00:00

Add support for DCN 4.2 in Display Core Signed-off-by: Roman Li Acked-by: Harry Wentland Signed-off-by: Alex Deucher

drm/amd/display: Add dcn42 DC resources

2026-02-23T19:28:33+00:00

Display Core resources for DCN 4.2: - CLK_MGR - DCCG - DIO - DPP - GPIO - HPO - HUBBUB - HUBP - HWSS - IRQ - MMHUBBUB - MPC - OPTC - PG Signed-off-by: Roman Li Acked-by: Harry Wentland Signed-off-by: Alex Deucher

drm/amd/display: bypass post csc for additional color spaces in dal

2026-02-12T20:16:09+00:00

[Why] For RGB BT2020 full and limited color spaces, overlay adjustments were applied twice (once by MM and once by DAL). This results in incorrect colours and a noticeable difference between mpo and non-mpo cases. [How] Add RGB BT2020 full and limited color spaces to list that bypasses post csc adjustment. Reviewed-by: Aric Cyr Signed-off-by: Clay King Signed-off-by: Tom Chung Signed-off-by: Alex Deucher

drm/amd/display: DPP low mem pwr related adjustment -Part I

2025-12-16T18:26:06+00:00

[why] Default low pwr mem state get chagned. SW needs to wake mem up first also need to put back to LS again after use: will do in Part II. Reviewed-by: Leo Chen Signed-off-by: Charlene Liu Signed-off-by: Chenyu Chen Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher