kernel/linux.git/drivers/gpu/drm/amd/display/dc/dml, branch linux-6.9.y

drm/amd/display: Account for cursor prefetch BW in DML1 mode support

2024-07-25T07:53:38+00:00

[ Upstream commit 074b3a886713f69d98d30bb348b1e4cb3ce52b22 ] [Description] We need to ensure to take into account cursor prefetch BW in mode support or we may pass ModeQuery but fail an actual flip which will cause a hang. Flip may fail because the cursor_pre_bw is populated during mode programming (and mode programming is never called prior to ModeQuery). Reviewed-by: Chaitanya Dhere Reviewed-by: Nevenko Stupar Signed-off-by: Jerry Zuo Signed-off-by: Alvin Lee Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin

drm/amd/display: change dram_clock_latency to 34us for dcn35

2024-07-25T07:53:30+00:00

[ Upstream commit 6071607bfefefc50a3907c0ba88878846960d29a ] [Why & How] Current DRAM setting would cause underflow on customer platform. Modify dram_clock_change_latency_us from 11.72 to 34.0 us as per recommendation from HW team Reviewed-by: Nicholas Kazlauskas Acked-by: Zaeem Mohamed Signed-off-by: Paul Hsieh Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin

drm/amd/display: Change dram_clock_latency to 34us for dcn351

2024-07-25T07:53:30+00:00

[ Upstream commit c60e20f13c27662de36cd5538d6299760780db52 ] [Why] Intermittent underflow observed when using 4k144 display on dcn351 [How] Update dram_clock_change_latency_us from 11.72us to 34us Reviewed-by: Nicholas Kazlauskas Acked-by: Zaeem Mohamed Signed-off-by: Daniel Miess Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin

drm/amd/display: Enable urgent latency adjustments for DCN35

2024-05-08T19:47:47+00:00

[Why] Underflow occurs when running Netflix in a 4k144 eDP + 4k60 HDMI FRL setup. It is caused by latency varying based on the DCFCLK/FCLK state. [How] Enable urgent latency adjustment and match the reference to existing ASIC that also see increased latency at low FCLK. Reviewed-by: Nicholas Kazlauskas Acked-by: Tom Chung Signed-off-by: Nicholas Susanto Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Add VCO speed parameter for DCN31 FPU

2024-05-01T01:45:27+00:00

Add VCO speed parameters in the bounding box array. Acked-by: Wayne Lin Signed-off-by: Rodrigo Siqueira Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Update dcn351 to latest dcn35 config

2024-03-27T12:57:39+00:00

[why & how] There were some fixes in dcn35 that need to be ported over to dcn351 to prevent any regression. Signed-off-by: Sung Joon Kim Reviewed-by: Liu, Xi (Alex) Signed-off-by: Alex Deucher

drm/amd/display: increase bb clock for DCN351

2024-03-27T12:50:05+00:00

[Why and how] Bounding box clocks for DCN351 should be increased as per request Reviewed-by: Swapnil Patel Acked-by: Wayne Lin Signed-off-by: Xi Liu Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Increase Z8 watermark times.

2024-03-27T12:49:41+00:00

Increase Z8 watermark times from 210->250us and 320->350us. Reviewed-by: Nicholas Kazlauskas Acked-by: Wayne Lin Signed-off-by: Natanel Roizenman Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Revert Remove pixle rate limit for subvp

2024-03-20T17:12:59+00:00

This reverts commit 340383c734f8 ("drm/amd/display: Remove pixle rate limit for subvp") [why] The original commit causes a regression when subvp is applied on ODM required 8k60hz timing. The display shows black screen on boot. The issue can be recovered with hotplug. It also causes MPO to fail. We will temprarily revert this commit and investigate the root cause further. Cc: Mario Limonciello Cc: Alex Deucher Cc: stable@vger.kernel.org Reviewed-by: Chaitanya Dhere Reviewed-by: Martin Leung Acked-by: Wayne Lin Signed-off-by: Wenjing Liu Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: add DC changes for DCN351

2024-03-04T20:59:08+00:00

Add DC support for DCN 3.5.1. Signed-off-by: Hamza Mahfooz Signed-off-by: Alex Deucher