<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpu/drm/amd/display/dc/dm_pp_smu.h, branch v5.10.78</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v5.10.78</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v5.10.78'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2020-09-15T21:52:40+00:00</updated>
<entry>
<title>drm/amdgpu: drop BOOLEAN define in display part</title>
<updated>2020-09-15T21:52:40+00:00</updated>
<author>
<name>Flora Cui</name>
<email>flora.cui@amd.com</email>
</author>
<published>2020-09-08T07:26:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=26652cd8deae0b039b00e07e77706d29415b5bce'/>
<id>urn:sha1:26652cd8deae0b039b00e07e77706d29415b5bce</id>
<content type='text'>
use bool directly

Signed-off-by: Flora Cui &lt;flora.cui@amd.com&gt;
Reviewed-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_1 flag</title>
<updated>2019-11-13T20:29:44+00:00</updated>
<author>
<name>Bhawanpreet Lakha</name>
<email>Bhawanpreet.Lakha@amd.com</email>
</author>
<published>2019-11-06T19:44:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=aca935c7cc866a935a61769c9e9782dd834a8502'/>
<id>urn:sha1:aca935c7cc866a935a61769c9e9782dd834a8502</id>
<content type='text'>
[Why]

DCN21 is stable enough to be build by default. So drop the flags.

[How]

Remove them using the unifdef tool. The following commands were executed
in sequence:

$ find -name '*.c' -exec unifdef -m -DCONFIG_DRM_AMD_DC_DCN2_1 -UCONFIG_TRIM_DRM_AMD_DC_DCN2_1 '{}' ';'
$ find -name '*.h' -exec unifdef -m -DCONFIG_DRM_AMD_DC_DCN2_1 -UCONFIG_TRIM_DRM_AMD_DC_DCN2_1 '{}' ';'

In addition:

* Remove from kconfig, and replace any dependencies with DCN1_0.
* Remove from any makefiles.
* Fix and cleanup Renoir definitions in dal_asic_id.h
* Expand DCN1 ifdef to include DCN21 code in the following files:
    * clk_mgr/clk_mgr.c: dc_clk_mgr_create()
    * core/dc_resources.c: dc_create_resource_pool()
    * gpio/hw_factory.c: dal_hw_factory_init()
    * gpio/hw_translate.c: dal_hw_translate_init()

Signed-off-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_0 and DSC_SUPPORTED</title>
<updated>2019-11-13T20:29:44+00:00</updated>
<author>
<name>Bhawanpreet Lakha</name>
<email>Bhawanpreet.Lakha@amd.com</email>
</author>
<published>2019-11-06T19:38:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=1da37801a8b0fffb024fea594c7f1d7867ed8aa0'/>
<id>urn:sha1:1da37801a8b0fffb024fea594c7f1d7867ed8aa0</id>
<content type='text'>
[Why]

DCN2 and DSC are stable enough to be build by default. So drop the flags.

[How]

Remove them using the unifdef tool. The following commands were executed
in sequence:

$ find -name '*.c' -exec unifdef -m -DCONFIG_DRM_AMD_DC_DSC_SUPPORT -DCONFIG_DRM_AMD_DC_DCN2_0 -UCONFIG_TRIM_DRM_AMD_DC_DCN2_0 '{}' ';'
$ find -name '*.h' -exec unifdef -m -DCONFIG_DRM_AMD_DC_DSC_SUPPORT -DCONFIG_DRM_AMD_DC_DCN2_0 -UCONFIG_TRIM_DRM_AMD_DC_DCN2_0 '{}' ';'

In addition:

* Remove from kconfig, and replace any dependencies with DCN1_0.
* Remove from any makefiles.
* Fix and cleanup NV defninitions in dal_asic_id.h
* Expand DCN1 ifdef to include DCN2 code in the following files:
    * clk_mgr/clk_mgr.c: dc_clk_mgr_create()
    * core/dc_resources.c: dc_create_resource_pool()
    * dce/dce_dmcu.c: dcn20_*lock_phy()
    * dce/dce_dmcu.c: dcn20_funcs
    * dce/dce_dmcu.c: dcn20_dmcu_create()
    * gpio/hw_factory.c: dal_hw_factory_init()
    * gpio/hw_translate.c: dal_hw_translate_init()

Signed-off-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: fix number of dcn21 dpm clock levels</title>
<updated>2019-10-25T20:50:08+00:00</updated>
<author>
<name>Dmytro Laktyushkin</name>
<email>Dmytro.Laktyushkin@amd.com</email>
</author>
<published>2019-10-01T15:01:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=5cb4ca07c2d53d492f014ee65995fcfc08f43db9'/>
<id>urn:sha1:5cb4ca07c2d53d492f014ee65995fcfc08f43db9</id>
<content type='text'>
These are specific to dcn21 and should not be increased for
reuse on other asics.

Signed-off-by: Dmytro Laktyushkin &lt;Dmytro.Laktyushkin@amd.com&gt;
Reviewed-by: Chris Park &lt;Chris.Park@amd.com&gt;
Acked-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: change PP_SM defs to 8</title>
<updated>2019-10-17T20:29:10+00:00</updated>
<author>
<name>Bhawanpreet Lakha</name>
<email>Bhawanpreet.Lakha@amd.com</email>
</author>
<published>2019-10-03T17:49:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=92a5dc22051b3b1054bc696f45142a77c779abeb'/>
<id>urn:sha1:92a5dc22051b3b1054bc696f45142a77c779abeb</id>
<content type='text'>
DPM level is 8 these were incorrect before. Fix them

Signed-off-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Reviewed-by: Roman Li &lt;Roman.Li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/display: fix build error casused by CONFIG_DRM_AMD_DC_DCN2_1</title>
<updated>2019-10-15T19:51:25+00:00</updated>
<author>
<name>Hersen Wu</name>
<email>hersenxs.wu@amd.com</email>
</author>
<published>2019-10-15T16:47:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=e70bd049d00729b6c632c8ddd921bc3c5afaf19b'/>
<id>urn:sha1:e70bd049d00729b6c632c8ddd921bc3c5afaf19b</id>
<content type='text'>
when CONFIG_DRM_AMD_DC_DCN2_1 is not enable in .config,
there is build error. struct dpm_clocks shoud not be
guarded.

Signed-off-by: Hersen Wu &lt;hersenxs.wu@amd.com&gt;
Reviewed-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/display: hook renoir dc to pplib funcs</title>
<updated>2019-10-15T19:51:18+00:00</updated>
<author>
<name>Hersen Wu</name>
<email>hersenxs.wu@amd.com</email>
</author>
<published>2019-10-15T14:34:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=71a0df4be65bfa5b0ccfe10d9c99fc2d516d8083'/>
<id>urn:sha1:71a0df4be65bfa5b0ccfe10d9c99fc2d516d8083</id>
<content type='text'>
enable dc get dmp clock table and set dcn watermarks
via pplib.

Signed-off-by: Hersen Wu &lt;hersenxs.wu@amd.com&gt;
Reviewed-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add pp_smu functions for Renoir</title>
<updated>2019-08-29T20:52:33+00:00</updated>
<author>
<name>Bhawanpreet Lakha</name>
<email>Bhawanpreet.Lakha@amd.com</email>
</author>
<published>2019-07-25T19:58:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=82f9146832c60e5d1f0e4ed7ee82c7a18dff5cc1'/>
<id>urn:sha1:82f9146832c60e5d1f0e4ed7ee82c7a18dff5cc1</id>
<content type='text'>
This defines the interface for communicating requirements
between DC and powerplay.

Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add DC core changes for DCN2</title>
<updated>2019-06-21T23:59:35+00:00</updated>
<author>
<name>Harry Wentland</name>
<email>harry.wentland@amd.com</email>
</author>
<published>2019-02-22T21:52:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6fbefb84a98ecc43cb4035c44fe417e6751ddd83'/>
<id>urn:sha1:6fbefb84a98ecc43cb4035c44fe417e6751ddd83</id>
<content type='text'>
Core DC changes for DCN2.

Signed-off-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix type of pp_smu_wm_set_range struct</title>
<updated>2019-05-31T15:39:32+00:00</updated>
<author>
<name>Eric Yang</name>
<email>Eric.Yang2@amd.com</email>
</author>
<published>2019-04-10T20:31:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=961ea20155d79794ec581861680c6926be299898'/>
<id>urn:sha1:961ea20155d79794ec581861680c6926be299898</id>
<content type='text'>
[why]
Value read from SMU is 16 bits, not 32.

[How]
Fix type, and add wm_type enum in preparation for future interfaces.

Signed-off-by: Eric Yang &lt;Eric.Yang2@amd.com&gt;
Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Acked-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
