<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpu/drm/amd/display/dc/dcn35, branch v6.7</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.7</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.7'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2023-11-29T23:07:49+00:00</updated>
<entry>
<title>drm/amd/display: Fix black screen on video playback with embedded panel</title>
<updated>2023-11-29T23:07:49+00:00</updated>
<author>
<name>Sung Joon Kim</name>
<email>sungkim@amd.com</email>
</author>
<published>2023-11-10T16:33:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=47831f4860d4e8cdfee4910d2b76ccd892fd72d1'/>
<id>urn:sha1:47831f4860d4e8cdfee4910d2b76ccd892fd72d1</id>
<content type='text'>
[why]
We have dynamic power control in driver but
should be ignored when power is forced on.

[how]
Bypass any power control when it's forced on.

Cc: stable@vger.kernel.org
Reviewed-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Acked-by: Hamza Mahfooz &lt;hamza.mahfooz@amd.com&gt;
Signed-off-by: Sung Joon Kim &lt;sungkim@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Remove config update</title>
<updated>2023-11-29T23:06:44+00:00</updated>
<author>
<name>Taimur Hassan</name>
<email>syed.hassan@amd.com</email>
</author>
<published>2023-11-10T15:06:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c5ca994445a6c99012e70ed6f3550f07efa4c341'/>
<id>urn:sha1:c5ca994445a6c99012e70ed6f3550f07efa4c341</id>
<content type='text'>
[Why]
Prevent overwrite of dc-&gt;config.use_default_clock_table, as it should be
pre-configured.

Reviewed-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Acked-by: Hamza Mahfooz &lt;hamza.mahfooz@amd.com&gt;
Signed-off-by: Taimur Hassan &lt;syed.hassan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add z-state support policy for dcn35</title>
<updated>2023-11-29T22:52:00+00:00</updated>
<author>
<name>Nicholas Kazlauskas</name>
<email>nicholas.kazlauskas@amd.com</email>
</author>
<published>2023-11-03T14:01:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c95f12b7b724abee5e8c3727db066c63c0876db3'/>
<id>urn:sha1:c95f12b7b724abee5e8c3727db066c63c0876db3</id>
<content type='text'>
[Why]
DML2 means that the dcn3x policy for calculating z-state support
no longer runs from validate_bandwidth.

This means we are unconditionally allowing Z8, the hardware default.

[How]
Port the policy over to DCN35, but with a few modifications:
- Don't use min_dst_y_next_start as a check for Z8/Z10 allow
- Add support for overriding the Z10 stutter period per ASIC
- Cleanup the code to make the policy assignment more clear

Reviewed-by: Charlene Liu &lt;charlene.liu@amd.com&gt;
Acked-by: Hamza Mahfooz &lt;hamza.mahfooz@amd.com&gt;
Signed-off-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix encoder disable logic</title>
<updated>2023-11-17T05:55:17+00:00</updated>
<author>
<name>Nicholas Susanto</name>
<email>nicholas.susanto@amd.com</email>
</author>
<published>2023-11-01T19:30:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=0ee057e66c4b782809a0a9265cdac5542e646706'/>
<id>urn:sha1:0ee057e66c4b782809a0a9265cdac5542e646706</id>
<content type='text'>
[WHY]
DENTIST hangs when OTG is off and encoder is on. We were not
disabling the encoder properly when switching from extended mode to
external monitor only.

[HOW]
Disable the encoder using an existing enable/disable fifo helper instead
of enc35_stream_encoder_enable.

Cc: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Reviewed-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Acked-by: Alex Hung &lt;alex.hung@amd.com&gt;
Signed-off-by: Nicholas Susanto &lt;nicholas.susanto@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: avoid variable reinitialization</title>
<updated>2023-11-07T17:03:31+00:00</updated>
<author>
<name>Bragatheswaran Manickavel</name>
<email>bragathemanick0908@gmail.com</email>
</author>
<published>2023-10-24T18:11:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c68b4550b6b432cbb05ad30f67178d2d3845d919'/>
<id>urn:sha1:c68b4550b6b432cbb05ad30f67178d2d3845d919</id>
<content type='text'>
The member variable enable_hpo_pg_support is already initialized
and hence the reinitialization instruction can be removed. Issue
identified using the doubleinit.cocci Coccinelle semantic patch script.

Signed-off-by: Bragatheswaran Manickavel &lt;bragathemanick0908@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Enable physymclk RCO</title>
<updated>2023-11-07T17:03:30+00:00</updated>
<author>
<name>Daniel Miess</name>
<email>daniel.miess@amd.com</email>
</author>
<published>2023-10-26T18:34:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=e4c33fff2eae41d16d9760e56efc23dcc30c6b91'/>
<id>urn:sha1:e4c33fff2eae41d16d9760e56efc23dcc30c6b91</id>
<content type='text'>
[Why]
Enable the last of the RCO options for dcn35

[How]
Breakout RCO from dccg35_set_physymclk so that
physymclk RCO can be set in dccg_init without
disabling physymclk

Reviewed-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Reviewed-by: Jun Lei &lt;jun.lei@amd.com&gt;
Acked-by: Hersen Wu &lt;hersenxs.wu@amd.com&gt;
Signed-off-by: Daniel Miess &lt;daniel.miess@amd.com&gt;
Signed-off-by: Hersen Wu &lt;hersenxs.wu@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: DCN35 Disable cm power optimization</title>
<updated>2023-11-07T16:17:24+00:00</updated>
<author>
<name>Yihan Zhu</name>
<email>yihan.zhu@amd.com</email>
</author>
<published>2023-10-19T18:23:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=85de32cd7b383f5d84195aed0c53e920e6786005'/>
<id>urn:sha1:85de32cd7b383f5d84195aed0c53e920e6786005</id>
<content type='text'>
[WHY &amp; HOW]
Enabling SCE after boot up will cause color distortion.

Reviewed-by: Ovidiu Bunea &lt;ovidiu.bunea@amd.com&gt;
Acked-by: Hersen Wu &lt;hersenxs.wu@amd.com&gt;
Signed-off-by: Yihan Zhu &lt;yihan.zhu@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Enable RCO options for dcn35</title>
<updated>2023-11-07T16:16:48+00:00</updated>
<author>
<name>Daniel Miess</name>
<email>daniel.miess@amd.com</email>
</author>
<published>2023-10-20T16:31:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=eacfdc362d3c1eaab517f7c25b089f2536c010f1'/>
<id>urn:sha1:eacfdc362d3c1eaab517f7c25b089f2536c010f1</id>
<content type='text'>
[Why &amp; How]
Enable root clock optimization options for dcn35
for power savings

Reviewed-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Acked-by: Hersen Wu &lt;hersenxs.wu@amd.com&gt;
Signed-off-by: Daniel Miess &lt;daniel.miess@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: On boot disable domain22 force power on</title>
<updated>2023-11-07T16:15:48+00:00</updated>
<author>
<name>Daniel Miess</name>
<email>daniel.miess@amd.com</email>
</author>
<published>2023-10-13T14:38:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=89830c62e677187a75b25202effbbf6611fc6552'/>
<id>urn:sha1:89830c62e677187a75b25202effbbf6611fc6552</id>
<content type='text'>
[Why]
HDCP2 enablement fails when domain22 is set to force
power on

[How]
Disable force power on for domain22 on startup

Reviewed-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Acked-by: Hersen Wu &lt;hersenxs.wu@amd.com&gt;
Signed-off-by: Daniel Miess &lt;daniel.miess@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Program plane color setting correctly</title>
<updated>2023-11-03T16:18:33+00:00</updated>
<author>
<name>Sung Joon Kim</name>
<email>sungkim@amd.com</email>
</author>
<published>2023-10-11T19:48:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=995dedb7a4fa9703d1ae584914b0aa12b5da454c'/>
<id>urn:sha1:995dedb7a4fa9703d1ae584914b0aa12b5da454c</id>
<content type='text'>
[why]
There are some registers for plane
color that are skipped programming
on resume. Need to add those as part
of the sequence.

[how]
Add new function hook for programming
plane color control.

Reviewed-by: Duncan Ma &lt;duncan.ma@amd.com&gt;
Acked-by: Hersen Wu &lt;hersenxs.wu@amd.com&gt;
Signed-off-by: Sung Joon Kim &lt;sungkim@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
