kernel/linux.git/drivers/gpu/drm/amd/display/dc/dcn32, branch v6.7

drm/amd/display: Fix blend LUT programming

2023-11-03T16:18:33+00:00

[Why] LUT write index does not get reset to zero when writing the LUT values for each separate RGB component, which results in wrong data for 2 of the 3 components. [How] Reset LUT write index to zero before writing each component's data. Reviewed-by: Krunoslav Kovac Acked-by: Hersen Wu Signed-off-by: Ilya Bakoulin Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: add interface to query SubVP status

2023-10-26T23:02:31+00:00

[Why&How] To enable automated testing through IGT, expose an API that is accessible through debugfs to query current status of SubVP feature. Reviewed-by: Alvin Lee Acked-by: Roman Li Signed-off-by: Aurabindo Pillai Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Update FAMS sequence for DCN30 & DCN32

2023-10-26T23:00:23+00:00

Provide DCN32 specific sequence and update DCN30 sequence Reviewed-by: Samson Tam Acked-by: Roman Li Signed-off-by: Alvin Lee Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: implement map dc pipe with callback in DML2

2023-10-26T22:57:51+00:00

[why] Unify pipe resource management logic in dc resource layer. V2: Add default case for switch. CC: Hamza Mahfooz Reviewed-by: Chaitanya Dhere Signed-off-by: Wenjing Liu Reviewed-by: Rodrigo Siqueira Reviewed-by: Jun Lei Acked-by: Roman Li Signed-off-by: Qingqing Zhuo Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: add pipe resource management callbacks to DML2

2023-10-26T22:57:43+00:00

[why] Need DML2 to support new pipe resource management APIs. Reviewed-by: Chaitanya Dhere Acked-by: Roman Li Signed-off-by: Wenjing Liu Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Remove brackets in macro to conform to coding style

2023-10-19T22:26:51+00:00

[Why] Many of the register macros defined ind dcn32_resource.h have extra brackets. This is not conforming to the style of those defined in other DC header files. [How] Remove these brackets in dcn32_resource.h Reviewed-by: Aurabindo Pillai Signed-off-by: Stylon Wang Signed-off-by: Alex Deucher

drm/amd/display: Refactor HWSS into component folder

2023-10-09T21:00:09+00:00

[why] Rename hw_sequencer to hwseq. Move all hwseq files to unique folder hwss. [how] creating hwss repo in dc, and moved the dcnxx_hwseq.c and .h files into corresponding new folders inside the hwss and cleared the linkage errors by adding relative paths in the Makefile.template. Reviewed-by: Martin Leung Acked-by: Tom Chung Signed-off-by: Mounika Adhuri Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Introduce DML2

2023-10-09T20:48:51+00:00

DC is transitioning from DML to DML2, and this commit introduces all the required changes for some of the already available ASICs and adds the required code infra to support new ASICs under DML2. DML2 is also a generated code that provides better mode verification and programming models for software/hardware, and it enables a better way to create validation tools. This version is more like a middle step to the complete transition to the DML2 version. Changes since V1: - Alex: Fix typos Changes since V2: - Update DC includes Changes since V3: - Fix 32 bit compilation issues on x86 Changes since V4: - Avoid compilation of DML2 on some not supported 32-bit architecture - Update commit message Co-developed-by: Rodrigo Siqueira Signed-off-by: Rodrigo Siqueira Co-developed-by: Roman Li Signed-off-by: Roman Li Signed-off-by: Qingqing Zhuo Signed-off-by: Alex Deucher

drm/amd/display: enable dsc_clk even if dsc_pg disabled

2023-10-04T22:41:17+00:00

[why] need to enable dsc_clk regardless dsc_pg Reviewed-by: Charlene Liu Cc: Mario Limonciello Cc: Alex Deucher Cc: stable@vger.kernel.org Acked-by: Aurabindo Pillai Signed-off-by: Muhammad Ahmed Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: set stream gamut remap matrix to MPC for DCN3+

2023-09-26T21:00:22+00:00

dc->caps.color.mpc.gamut_remap says there is a post-blending color block for gamut remap matrix for DCN3 HW family and newer versions. However, those drivers still follow DCN10 programming that remap stream gamut_remap_matrix to DPP (pre-blending). To enable pre-blending and post-blending gamut_remap matrix supports at the same time, set stream gamut_remap to MPC and plane gamut_remap to DPP for DCN families that support both. It was tested using IGT KMS color tests for DRM CRTC CTM property and it preserves test results. Signed-off-by: Melissa Wen Signed-off-by: Harry Wentland Reviewed-by: Harry Wentland Signed-off-by: Alex Deucher