kernel/linux.git/drivers/gpu/drm/amd/display/dc/dcn321, branch v6.7

drm/amd/display: add interface to query SubVP status

2023-10-26T23:02:31+00:00

[Why&How] To enable automated testing through IGT, expose an API that is accessible through debugfs to query current status of SubVP feature. Reviewed-by: Alvin Lee Acked-by: Roman Li Signed-off-by: Aurabindo Pillai Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: add pipe resource management callbacks to DML2

2023-10-26T22:57:43+00:00

[why] Need DML2 to support new pipe resource management APIs. Reviewed-by: Chaitanya Dhere Acked-by: Roman Li Signed-off-by: Wenjing Liu Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Set the DML2 attribute to false in all DCNs older than version 3.5

2023-10-26T22:41:22+00:00

When DML2 was introduced, it targeted only new DCN versions. For controlling which ASIC should use this new version of DML, it was introduced the using_dml2 attribute. To avoid ambiguities, this commit explicitly sets using_dml2 to false in all ASICs that do not support DML2. Cc: Vitaly Prosyak Cc: Roman Li Cc: Qingqing Zhuo Cc: Daniel Wheeler Cc: Alex Deucher Reviewed-by: Harry Wentland Signed-off-by: Rodrigo Siqueira Signed-off-by: Alex Deucher

drm/amd/display: Refactor HWSS into component folder

2023-10-09T21:00:09+00:00

[why] Rename hw_sequencer to hwseq. Move all hwseq files to unique folder hwss. [how] creating hwss repo in dc, and moved the dcnxx_hwseq.c and .h files into corresponding new folders inside the hwss and cleared the linkage errors by adding relative paths in the Makefile.template. Reviewed-by: Martin Leung Acked-by: Tom Chung Signed-off-by: Mounika Adhuri Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Introduce DML2

2023-10-09T20:48:51+00:00

DC is transitioning from DML to DML2, and this commit introduces all the required changes for some of the already available ASICs and adds the required code infra to support new ASICs under DML2. DML2 is also a generated code that provides better mode verification and programming models for software/hardware, and it enables a better way to create validation tools. This version is more like a middle step to the complete transition to the DML2 version. Changes since V1: - Alex: Fix typos Changes since V2: - Update DC includes Changes since V3: - Fix 32 bit compilation issues on x86 Changes since V4: - Avoid compilation of DML2 on some not supported 32-bit architecture - Update commit message Co-developed-by: Rodrigo Siqueira Signed-off-by: Rodrigo Siqueira Co-developed-by: Roman Li Signed-off-by: Roman Li Signed-off-by: Qingqing Zhuo Signed-off-by: Alex Deucher

drm/amd/display: add missing function pointer for DCN321 resource

2023-09-26T21:00:22+00:00

[why] acquire_free_pipe_as_secondary_opp_head function pointer is not assigned. This causes ODM mode to be disabled after enabling windowed MPO ODM capability on DCN321. [how] assign the correct function to the function pointer. Reviewed-by: Dillon Varone Acked-by: Wayne Lin Signed-off-by: Wenjing Liu Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: add more pipe resource interfaces

2023-08-30T19:35:30+00:00

Redesign pipe resource interfaces in resource.h file. The new interface design addresses the issue with lack of pipe topology encapsulation and lack of pipe accessors. Reviewed-by: Jun Lei Acked-by: Hamza Mahfooz Signed-off-by: Wenjing Liu Signed-off-by: Alex Deucher

drm/amd/display: rename acquire_idle_pipe_for_layer to acquire_free_pipe_as_sec_dpp_pipe

2023-08-07T21:14:09+00:00

[why] Secondary DPP pipes are used for rendering secondary layers of planes. The name "for layer" doesn't make it obvious. The function is acquiring a free pipe as secondary dpp pipe only. We rename it so it is more obvious. In a future follow up change, we want to add functions to acquire free pipe as opp head pipe or otg master pipe as well. They will have their separate allocation priority. Reviewed-by: Jun Lei Acked-by: Tom Chung Signed-off-by: Wenjing Liu Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: update add plane to context logic with a new algorithm

2023-08-07T21:14:08+00:00

[why] Preivous algorithm for finding an optimal idle pipe for a new plane was implemented to handle dynamic pipe allocation when MPO plane moves from one ODM slice to the other. Now pipe allocation is more static so it no longer depends on the MPO plane's position. We are simplifying our logic and remove unnecessary handling in our code. [how] Apply a new simplified version of pipe resource allocation logic to reduce unnecessary flip delay caused by swapping secondary dpp pipe to other MPC blending tree. Reviewed-by: Jun Lei Acked-by: Tom Chung Signed-off-by: Wenjing Liu Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Enable dc mode clock switching for DCN32x

2023-06-23T19:45:57+00:00

- DC mode clock switch interface was previously only executed for DCN303. Enable it for DCN32x so that the interface is called correctly - Assign function pointers for DCN32x that are used in the dc mode interface - Update the dc mode interface to work generically for each ASIC - In update_clocks, make sure to consider softmax if we're in DC mode Reviewed-by: Jun Lei Acked-by: Hamza Mahfooz Signed-off-by: Alvin Lee Signed-off-by: Alex Deucher