<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpu/drm/amd/display/dc/dcn31, branch v6.7</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.7</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.7'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2023-10-26T22:41:23+00:00</updated>
<entry>
<title>drm/amd/display: Fix copyright notice in DC code</title>
<updated>2023-10-26T22:41:23+00:00</updated>
<author>
<name>Stylon Wang</name>
<email>stylon.wang@amd.com</email>
</author>
<published>2023-10-19T14:49:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=78964fcac47fc1525ecb4c37cd5fbc873c28320b'/>
<id>urn:sha1:78964fcac47fc1525ecb4c37cd5fbc873c28320b</id>
<content type='text'>
[Why &amp; How]
Fix incomplete copyright notice in DC code.

Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Stylon Wang &lt;stylon.wang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Set the DML2 attribute to false in all DCNs older than version 3.5</title>
<updated>2023-10-26T22:41:22+00:00</updated>
<author>
<name>Rodrigo Siqueira</name>
<email>Rodrigo.Siqueira@amd.com</email>
</author>
<published>2023-10-20T21:17:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=79de4d9ade7411ffdddf0b69c87020311731d155'/>
<id>urn:sha1:79de4d9ade7411ffdddf0b69c87020311731d155</id>
<content type='text'>
When DML2 was introduced, it targeted only new DCN versions. For
controlling which ASIC should use this new version of DML, it was
introduced the using_dml2 attribute. To avoid ambiguities, this commit
explicitly sets using_dml2 to false in all ASICs that do not support
DML2.

Cc: Vitaly Prosyak &lt;vprosyak@amd.com&gt;
Cc: Roman Li &lt;roman.li@amd.com&gt;
Cc: Qingqing Zhuo &lt;Qingqing.Zhuo@amd.com&gt;
Cc: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Cc: Alex Deucher &lt;Alexander.Deucher@amd.com&gt;
Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: reprogram det size while seamless boot</title>
<updated>2023-10-26T22:41:21+00:00</updated>
<author>
<name>Hugo Hu</name>
<email>hugo.hu@amd.com</email>
</author>
<published>2023-08-22T09:01:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=bf795156105150a7a242389c56fca382ddc984c5'/>
<id>urn:sha1:bf795156105150a7a242389c56fca382ddc984c5</id>
<content type='text'>
[Why]
During system boot in second screen only mode on a seamless boot system,
there is a chance that the pipe's det size might not be reset.

[How]
Reset the det size while resetting the pipe during seamless boot.

Reviewed-by: Dmytro Laktyushkin &lt;dmytro.laktyushkin@amd.com&gt;
Acked-by: Roman Li &lt;roman.li@amd.com&gt;
Signed-off-by: Hugo Hu &lt;hugo.hu@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Refactor HWSS into component folder</title>
<updated>2023-10-09T21:00:09+00:00</updated>
<author>
<name>Mounika Adhuri</name>
<email>moadhuri@amd.com</email>
</author>
<published>2023-09-22T12:53:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=e53524cdcc02d089e757b668da031ba06ff665c3'/>
<id>urn:sha1:e53524cdcc02d089e757b668da031ba06ff665c3</id>
<content type='text'>
[why]
Rename hw_sequencer to hwseq.
Move all hwseq files to unique
folder hwss.

[how]
creating hwss repo in dc, and moved the dcnxx_hwseq.c
and .h files into corresponding new folders inside the hwss
and cleared the linkage errors by adding relative paths
in the Makefile.template.

Reviewed-by: Martin Leung &lt;martin.leung@amd.com&gt;
Acked-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Signed-off-by: Mounika Adhuri &lt;moadhuri@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Create one virtual connector in DC</title>
<updated>2023-09-28T19:36:50+00:00</updated>
<author>
<name>Harry Wentland</name>
<email>harry.wentland@amd.com</email>
</author>
<published>2022-11-02T15:10:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=554340133e4f596fc40fd75a58f9cf18b6b8dbbc'/>
<id>urn:sha1:554340133e4f596fc40fd75a58f9cf18b6b8dbbc</id>
<content type='text'>
[WHAT]
Prepare a virtual connector for writeback.

Reviewed-by: Alex Hung &lt;alex.hung@amd.com&gt;
Signed-off-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Hung &lt;alex.hung@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: set stream gamut remap matrix to MPC for DCN3+</title>
<updated>2023-09-26T21:00:22+00:00</updated>
<author>
<name>Melissa Wen</name>
<email>mwen@igalia.com</email>
</author>
<published>2023-07-21T13:24:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=41801c6b3042e2813365ee4def3f2804fd77776a'/>
<id>urn:sha1:41801c6b3042e2813365ee4def3f2804fd77776a</id>
<content type='text'>
dc-&gt;caps.color.mpc.gamut_remap says there is a post-blending color block
for gamut remap matrix for DCN3 HW family and newer versions. However,
those drivers still follow DCN10 programming that remap stream
gamut_remap_matrix to DPP (pre-blending).

To enable pre-blending and post-blending gamut_remap matrix supports at
the same time, set stream gamut_remap to MPC and plane gamut_remap to
DPP for DCN families that support both.

It was tested using IGT KMS color tests for DRM CRTC CTM property and it
preserves test results.

Signed-off-by: Melissa Wen &lt;mwen@igalia.com&gt;
Signed-off-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: switch DC over to the new DRM logging macros</title>
<updated>2023-09-26T21:00:21+00:00</updated>
<author>
<name>Hamza Mahfooz</name>
<email>hamza.mahfooz@amd.com</email>
</author>
<published>2023-09-20T17:38:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=5d72e247e58c966f4e50cffebf0d414de7fc90ed'/>
<id>urn:sha1:5d72e247e58c966f4e50cffebf0d414de7fc90ed</id>
<content type='text'>
For multi-GPU systems it is difficult to tell which GPU a particular
message is being printed for and that is undesirable because it
complicates debugging efforts. Also, the new macros allow us to enable
logging for particular parts of the codebase more selectively (since we
no longer need to throw everything at DRM_DEBUG_KMS()). So, for the
reasons outlined above we should switch to the new macros.

We can accomplish this by using the existing DC_LOGGER code to pass
around the relevant `struct drm_device` which will be fed to the new
macros in logger_types.h. Also, we must get rid of all instances of the
DC_LOG_.*() functions that are currently in amdgpu_dm since we don't use
the DC logger there and we can simply refer to the macros directly
there instead.

Reviewed-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Hamza Mahfooz &lt;hamza.mahfooz@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Update DCN31 for DCN35 support</title>
<updated>2023-08-30T19:51:14+00:00</updated>
<author>
<name>Qingqing Zhuo</name>
<email>Qingqing.Zhuo@amd.com</email>
</author>
<published>2023-08-03T05:06:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=efc1d1c9893726851e62c2c3c69a1af7258af651'/>
<id>urn:sha1:efc1d1c9893726851e62c2c3c69a1af7258af651</id>
<content type='text'>
[Why &amp; How]
Update DCN31 files for DCN35 usage.

Signed-off-by: Qingqing Zhuo &lt;Qingqing.Zhuo@amd.com&gt;
Acked-by: Harry Wentland &lt;Harry.Wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: correct z8_watermark 16bit to 20bit mask</title>
<updated>2023-08-30T19:37:47+00:00</updated>
<author>
<name>Charlene Liu</name>
<email>charlene.liu@amd.com</email>
</author>
<published>2023-08-17T00:40:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=d755ce6465cab1e60661f329db9eef8594403cf9'/>
<id>urn:sha1:d755ce6465cab1e60661f329db9eef8594403cf9</id>
<content type='text'>
remove double adjustment for DPREFCLK SS. dprefclk adjusted with SS is
used for dp audio only. if adjust DP_DTO, need to adjust VID_M/N

Reviewed-by: Muhammad Ahmed &lt;ahmed.ahmed@amd.com&gt;
Acked-by: Hamza Mahfooz &lt;hamza.mahfooz@amd.com&gt;
Signed-off-by: Charlene Liu &lt;charlene.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: add more pipe resource interfaces</title>
<updated>2023-08-30T19:35:30+00:00</updated>
<author>
<name>Wenjing Liu</name>
<email>wenjing.liu@amd.com</email>
</author>
<published>2023-08-10T17:59:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=2174181019e4273e583a0f0a9795e9db38984784'/>
<id>urn:sha1:2174181019e4273e583a0f0a9795e9db38984784</id>
<content type='text'>
Redesign pipe resource interfaces in resource.h file. The new interface
design addresses the issue with lack of pipe topology encapsulation and
lack of pipe accessors.

Reviewed-by: Jun Lei &lt;jun.lei@amd.com&gt;
Acked-by: Hamza Mahfooz &lt;hamza.mahfooz@amd.com&gt;
Signed-off-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
