kernel/linux.git/drivers/gpu/drm/amd/display/dc/dcn30, branch v6.7

drm/amd/display: Fix blend LUT programming

2023-11-03T16:18:33+00:00

[Why] LUT write index does not get reset to zero when writing the LUT values for each separate RGB component, which results in wrong data for 2 of the 3 components. [How] Reset LUT write index to zero before writing each component's data. Reviewed-by: Krunoslav Kovac Acked-by: Hersen Wu Signed-off-by: Ilya Bakoulin Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Program plane color setting correctly

2023-11-03T16:18:33+00:00

[why] There are some registers for plane color that are skipped programming on resume. Need to add those as part of the sequence. [how] Add new function hook for programming plane color control. Reviewed-by: Duncan Ma Acked-by: Hersen Wu Signed-off-by: Sung Joon Kim Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Set the DML2 attribute to false in all DCNs older than version 3.5

2023-10-26T22:41:22+00:00

When DML2 was introduced, it targeted only new DCN versions. For controlling which ASIC should use this new version of DML, it was introduced the using_dml2 attribute. To avoid ambiguities, this commit explicitly sets using_dml2 to false in all ASICs that do not support DML2. Cc: Vitaly Prosyak Cc: Roman Li Cc: Qingqing Zhuo Cc: Daniel Wheeler Cc: Alex Deucher Reviewed-by: Harry Wentland Signed-off-by: Rodrigo Siqueira Signed-off-by: Alex Deucher

Revert "drm/amd/display: Validate hw_points_num before using it"

2023-10-13T15:12:14+00:00

This reverts commit 58c3b3341cea4f75dc8c003b89f8a6dd8ec55e50. [WHY & HOW] The writeback series cause a regression in thunderbolt display. Signed-off-by: Alex Hung Reviewed-by: Harry Wentland Signed-off-by: Alex Deucher

Revert "drm/amd/display: Add new set_fc_enable to struct dwbc_funcs"

2023-10-13T15:05:45+00:00

This reverts commit b79a00a4d4f8fc827ca0fc19e259913a81252f6b. [WHY & HOW] The writeback series cause a regression in thunderbolt display. Signed-off-by: Alex Hung Reviewed-by: Harry Wentland Signed-off-by: Alex Deucher

drm/amd/display: Refactor HWSS into component folder

2023-10-09T21:00:09+00:00

[why] Rename hw_sequencer to hwseq. Move all hwseq files to unique folder hwss. [how] creating hwss repo in dc, and moved the dcnxx_hwseq.c and .h files into corresponding new folders inside the hwss and cleared the linkage errors by adding relative paths in the Makefile.template. Reviewed-by: Martin Leung Acked-by: Tom Chung Signed-off-by: Mounika Adhuri Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Add new set_fc_enable to struct dwbc_funcs

2023-10-03T19:42:50+00:00

[WHAT] Add a function to enable and disable DWB's frame captures. Reviewed-by: Harry Wentland Signed-off-by: Alex Hung Signed-off-by: Alex Deucher

drm/amd/display: Validate hw_points_num before using it

2023-10-03T19:42:26+00:00

[WHAT] hw_points_num is 0 before ogam LUT is programmed; however, function "dwb3_program_ogam_pwl" assumes hw_points_num is always greater than 0, i.e. substracting it by 1 as an array index. [HOW] Check hw_points_num is not equal to 0 before using it. Reviewed-by: Harry Wentland Signed-off-by: Alex Hung Signed-off-by: Alex Deucher

drm/amd/display: Add writeback enable/disable in dc

2023-10-03T19:42:12+00:00

[WHAT] The enable and disable writeback calls need to be included in the coressponding functions in dc_stream. Reviewed-by: Harry Wentland Signed-off-by: Alex Hung Signed-off-by: Alex Deucher

drm/amd/display: set stream gamut remap matrix to MPC for DCN3+

2023-09-26T21:00:22+00:00

dc->caps.color.mpc.gamut_remap says there is a post-blending color block for gamut remap matrix for DCN3 HW family and newer versions. However, those drivers still follow DCN10 programming that remap stream gamut_remap_matrix to DPP (pre-blending). To enable pre-blending and post-blending gamut_remap matrix supports at the same time, set stream gamut_remap to MPC and plane gamut_remap to DPP for DCN families that support both. It was tested using IGT KMS color tests for DRM CRTC CTM property and it preserves test results. Signed-off-by: Melissa Wen Signed-off-by: Harry Wentland Reviewed-by: Harry Wentland Signed-off-by: Alex Deucher