kernel/linux.git/drivers/gpu/drm/amd/display/dc/dcn302, branch v6.3

drm/amd/display: refactor ddc logic from dc_link_ddc to link_ddc

2023-01-13T19:57:40+00:00

[why] 1. Move dd_link_ddc functions to link_ddc. 2. Move link ddc functions declaration exposed in dc to link.h 3. Move link ddc functions declaration exposed in dm to dc_link.h 4. Remove i2caux_interface.h file Tested-by: Daniel Wheeler Reviewed-by: Jun Lei Acked-by: Rodrigo Siqueira Signed-off-by: Wenjing Liu Signed-off-by: Alex Deucher

drm/amd/display: Enable dp_hdmi21_pcon support

2022-12-06T15:15:55+00:00

[Why] It is not enabled for DCN3.0.1, 3.0.2, 3.0.3. [How] Add `dc->caps.dp_hdmi21_pcon_support = true` to these DCN versions. Reviewed-by: Martin Leung Acked-by: Stylon Wang Signed-off-by: David Galiffi Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: rework macros for DWB register access

2022-11-15T18:35:15+00:00

[Why] A hack was used to access DWB register due to difference in the register naming convention which was not compatible with existing SR/SRI* macros. The additional macro needed were added to dwb ip specific header file (dcnxx_dwb.h) instead of soc resource file (dcnxx_resource.c). Due to this pattern, BASE macro had to be redefined in dcnxx_dwb.h, which in turn needed us to undefine them in the resource file. [How] Add a separate macro for DWB access to the resource files that need it instead of defining them in DWB ip header file. This will enable us to reuse the BASE macro defined in the resource file. Reviewed-by: Roman Li Acked-by: Tom Chung Signed-off-by: Aurabindo Pillai Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Have risk for memory exhaustion

2022-11-09T22:41:42+00:00

In dcn*_clock_source_create when dcn*_clk_src_construct fails allocated clk_src needs release. A local attack could use this to cause memory exhaustion. Signed-off-by: LongJun Tang Signed-off-by: Alex Deucher

drm/amd/display: Refactor eDP PSR codes

2022-10-24T18:35:54+00:00

We split out PSR config from "global" to "per-panel" config settings. Tested-by: Mark Broadworth Reviewed-by: Robin Chen Acked-by: Rodrigo Siqueira Signed-off-by: Ian Chen Signed-off-by: Alex Deucher

drm/amd/display: Add debug option for exiting idle optimizations on cursor updates

2022-09-29T13:41:44+00:00

[Description] - Have option to exit idle opt on cursor updates for debug and optimizations purposes Reviewed-by: Aric Cyr Acked-by: Jasdeep Dhillon Signed-off-by: Brandon Syu Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Add dc_ctx to link_enc_create() parameters

2022-07-25T21:17:28+00:00

[Why&How] Preparation to enable run time initialization of register offsets to add dc_context to the link_enc_create callback. This is needed to get the dc_ctx handle where register offset initialization routine is called. Reviewed-by: Rodrigo Siqueira Acked-by: Alan Liu Acked-by: Alex Hung Signed-off-by: Aurabindo Pillai Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Drop unnecessary FPU flags on dcn302 files

2022-07-25T21:15:56+00:00

We already isolated the DCN302 code in the DML folder, but we forgot to drop the FPU flags from the Makefile. This commit drops those flags. Reviewed-by: Harry Wentland Acked-by: Alex Hung Signed-off-by: Rodrigo Siqueira Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amdgpu/display: make FP handling in Makefiles consistent

2022-06-15T01:38:41+00:00

Use the same pattern as the DML Makefile and while we are here add a missing x86 guard around the msse flags for DCN3.2.x. Reviewed-by: Harry Wentland Signed-off-by: Alex Deucher

drm/amd/display: Move FPU associated DCN30 code to DML folder

2022-05-26T18:56:31+00:00

[why & how] As part of the FPU isolation work documented in https://patchwork.freedesktop.org/series/93042/, isolate code that uses FPU in DCN30 to DML, where all FPU code should locate. Reviewed-by: Rodrigo Siqueira Acked-by: Qingqing Zhuo Signed-off-by: Jasdeep Dhillon Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher