<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpu/drm/amd/display/dc/dcn21, branch v6.3</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.3</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.3'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2023-02-08T22:15:51+00:00</updated>
<entry>
<title>drm/amd/display: break down dc_link.c</title>
<updated>2023-02-08T22:15:51+00:00</updated>
<author>
<name>Wenjing Liu</name>
<email>wenjing.liu@amd.com</email>
</author>
<published>2023-01-18T22:31:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=54618888d1ea7a26f8bccfb89e3c2420350c8047'/>
<id>urn:sha1:54618888d1ea7a26f8bccfb89e3c2420350c8047</id>
<content type='text'>
[why]
dc_link contains over 30k line of code, the decision is to break it
down to files residing in link folder based on functionality. This
change is the last break down change which will remove dc_link.c
file after everything is broken down.

[how]
Move remaining dc_link.c functions into link_detection, link_dpms,
link_validation, link_resource, and link_fpga and remove dc_link.

Reviewed-by: George Shen &lt;George.Shen@amd.com&gt;
Acked-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Signed-off-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Trivial swizzle-related code clean-ups</title>
<updated>2023-02-03T20:39:03+00:00</updated>
<author>
<name>Guilherme G. Piccoli</name>
<email>gpiccoli@igalia.com</email>
</author>
<published>2023-01-30T19:56:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=febb414745d98f0a6f14d7fd53f1965a455e19d5'/>
<id>urn:sha1:febb414745d98f0a6f14d7fd53f1965a455e19d5</id>
<content type='text'>
This is a very trivial code clean-up related to commit 5468c36d6285
("drm/amd/display: Filter Invalid 420 Modes for HDMI TMDS"). This commit
added a validation on driver probe to prevent invalid TMDS modes, but one
of the fake properties (swizzle) ended-up causing a warning on driver
probe; was reported here: https://gitlab.freedesktop.org/drm/amd/-/issues/2264.

It was fixed by commit a1cbe6916f44 ("drm/amd/display: patch cases with
unknown plane state to prevent warning"), but the validation code had
a double variable assignment, which we hereby remove. Also, the fix relies
in the dcn2{0,1}patch_unknown_plane_state() callbacks, so while at it we
took the opportunity to perform a small code clean-up in such routines.

Cc: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Cc: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Cc: Fangzhi Zuo &lt;Jerry.Zuo@amd.com&gt;
Cc: Harry Wentland &lt;harry.wentland@amd.com&gt;
Cc: Leo Li &lt;sunpeng.li@amd.com&gt;
Cc: Mark Broadworth &lt;mark.broadworth@amd.com&gt;
Cc: Melissa Wen &lt;mwen@igalia.com&gt;
Cc: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Cc: Sung Joon Kim &lt;Sungjoon.Kim@amd.com&gt;
Cc: Swapnil Patel &lt;Swapnil.Patel@amd.com&gt;
Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Guilherme G. Piccoli &lt;gpiccoli@igalia.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: refactor ddc logic from dc_link_ddc to link_ddc</title>
<updated>2023-01-13T19:57:40+00:00</updated>
<author>
<name>Wenjing Liu</name>
<email>wenjing.liu@amd.com</email>
</author>
<published>2022-12-12T18:52:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=a98cdd8c485600a2cfc15508a38c13c49b551fb1'/>
<id>urn:sha1:a98cdd8c485600a2cfc15508a38c13c49b551fb1</id>
<content type='text'>
[why]
1. Move dd_link_ddc functions to link_ddc.
2. Move link ddc functions declaration exposed in dc to link.h
3. Move link ddc functions declaration exposed in dm to dc_link.h
4. Remove i2caux_interface.h file

Tested-by: Daniel Wheeler &lt;Daniel.Wheeler@amd.com&gt;
Reviewed-by: Jun Lei &lt;Jun.Lei@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix spelling mistake: "dram_clk_chanage" -&gt; "dram_clk_change"</title>
<updated>2022-12-09T21:50:30+00:00</updated>
<author>
<name>Colin Ian King</name>
<email>colin.i.king@gmail.com</email>
</author>
<published>2022-12-08T12:18:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=2165359b7ed4e0b93fc23f49ede38d76e91fffe1'/>
<id>urn:sha1:2165359b7ed4e0b93fc23f49ede38d76e91fffe1</id>
<content type='text'>
There is a spelling mistake in the struct field dram_clk_chanage. Fix it.

Signed-off-by: Colin Ian King &lt;colin.i.king@gmail.com&gt;
Signed-off-by: Hamza Mahfooz &lt;hamza.mahfooz@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: rework macros for DWB register access</title>
<updated>2022-11-15T18:35:15+00:00</updated>
<author>
<name>Aurabindo Pillai</name>
<email>aurabindo.pillai@amd.com</email>
</author>
<published>2022-05-06T15:04:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=158858bf1a96adf8370ee829060e87fd10129e62'/>
<id>urn:sha1:158858bf1a96adf8370ee829060e87fd10129e62</id>
<content type='text'>
[Why]
A hack was used to access DWB register due to difference in the register
naming convention which was not compatible with existing SR/SRI* macros.
The additional macro needed were added to dwb ip specific header file
(dcnxx_dwb.h) instead of soc resource file (dcnxx_resource.c). Due to
this pattern, BASE macro had to be redefined in dcnxx_dwb.h, which in
turn needed us to undefine them in the resource file.

[How]
Add a separate macro for DWB access to the resource files that need it
instead of defining them in DWB ip header file. This will enable us to
reuse the BASE macro defined in the resource file.

Reviewed-by: Roman Li &lt;Roman.Li@amd.com&gt;
Acked-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Signed-off-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Refactor eDP PSR codes</title>
<updated>2022-10-24T18:35:54+00:00</updated>
<author>
<name>Ian Chen</name>
<email>ian.chen@amd.com</email>
</author>
<published>2022-10-20T15:46:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=bd829d5707730072fecc3267016a675a4789905b'/>
<id>urn:sha1:bd829d5707730072fecc3267016a675a4789905b</id>
<content type='text'>
We split out PSR config from "global" to "per-panel" config settings.

Tested-by: Mark Broadworth &lt;mark.broadworth@amd.com&gt;
Reviewed-by: Robin Chen &lt;robin.chen@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Ian Chen &lt;ian.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Refactor edp ILR caps codes</title>
<updated>2022-10-06T16:00:02+00:00</updated>
<author>
<name>Ian Chen</name>
<email>ian.chen@amd.com</email>
</author>
<published>2022-08-23T09:26:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=1178ac68dc2869a2f4192600b701de3d853272d2'/>
<id>urn:sha1:1178ac68dc2869a2f4192600b701de3d853272d2</id>
<content type='text'>
We split out ILR config from "global" to "per-panel" config settings.

Reviewed-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Acked-by: Hamza Mahfooz &lt;hamza.mahfooz@amd.com&gt;
Signed-off-by: Ian Chen &lt;ian.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: prevent S4 test from failing</title>
<updated>2022-10-06T15:59:14+00:00</updated>
<author>
<name>Charlene Liu</name>
<email>Charlene.Liu@amd.com</email>
</author>
<published>2022-09-20T13:23:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=dfb3367bd082ccf52d3c13ff62257f08407dffcf'/>
<id>urn:sha1:dfb3367bd082ccf52d3c13ff62257f08407dffcf</id>
<content type='text'>
[why]
limit the vm prefetch check for now, until the feature is fully
verified.

Reviewed-by: Hansen Dsouza &lt;Hansen.Dsouza@amd.com&gt;
Acked-by: Hamza Mahfooz &lt;hamza.mahfooz@amd.com&gt;
Signed-off-by: Charlene Liu &lt;Charlene.Liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: rework recent update PHY state commit</title>
<updated>2022-09-19T19:10:24+00:00</updated>
<author>
<name>Wenjing Liu</name>
<email>wenjing.liu@amd.com</email>
</author>
<published>2022-08-31T18:56:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=9c75891feef0f9f67cf1c8f8038371006e25d23f'/>
<id>urn:sha1:9c75891feef0f9f67cf1c8f8038371006e25d23f</id>
<content type='text'>
[why]
Original change 594b237b9a07 ("drm/amd/display: Add
interface to track PHY state") was implemented by assuming stream's
dpms off is equivalent to PHY power off.
This assumption doesn't hold in following situations:
1. MST multiple stream scenario, where multiple streams are sharing the
same PHY output. Toggle dpms off for one of the stream doesn't power
off the PHY due to the presence of other streams.
2. enable stream failure scenario, where enable stream fails due to
failure of link training. This will cause DPMS off is set to false, while
the actual PHY power state is off in certain cases.
Due to the problematic assumption, the logic will skip disabling
other streams for MST multiple stream scenario, therefore PHY is
not actually powered off.

[how]
1. Rework this refactor by moving PHY state update down to hardware
level, where we update PHY state in place when hardware sequencer
is actually changing the power state of the PHY hardware.
2. Reimplement symclk on TX off workaround in place when we are actually
calling transmitter control to power off PHY in dcn32. Note the workaround is
added due to the lack of proper software interface to set TX while keeping
symclk on. We plan to address this interface problem so we can set TX off
only without affecting symclk in future dcn versions.

Fixes: 594b237b9a07 ("drm/amd/display: Add interface to track PHY state")
Reviewed-by: Jun Lei &lt;Jun.Lei@amd.com&gt;
Acked-by: Wayne Lin &lt;wayne.lin@amd.com&gt;
Signed-off-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: avoid doing vm_init multiple time</title>
<updated>2022-08-16T22:09:16+00:00</updated>
<author>
<name>Charlene Liu</name>
<email>Charlene.Liu@amd.com</email>
</author>
<published>2022-08-05T16:59:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=5544a7b5a07480192eb5fd3536462faed2c21528'/>
<id>urn:sha1:5544a7b5a07480192eb5fd3536462faed2c21528</id>
<content type='text'>
[why]
this is to ensure that driver will not reprogram hvm_prefetch_req again if
it is done.

Reviewed-by: Martin Leung &lt;Martin.Leung@amd.com&gt;
Acked-by: Brian Chang &lt;Brian.Chang@amd.com&gt;
Signed-off-by: Charlene Liu &lt;Charlene.Liu@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
