kernel/linux.git/drivers/gpu/drm/amd/display/dc/dcn201, branch v6.2

drm/amd/display: update dccg based on HW delta

2022-09-19T19:16:49+00:00

[why] update hw dccg based on HW delta, and reuse common src code Reviewed-by: Nicholas Kazlauskas Reviewed-by: Dmytro Laktyushkin Acked-by: Wayne Lin Signed-off-by: Charlene Liu Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: rework recent update PHY state commit

2022-09-19T19:10:24+00:00

[why] Original change 594b237b9a07 ("drm/amd/display: Add interface to track PHY state") was implemented by assuming stream's dpms off is equivalent to PHY power off. This assumption doesn't hold in following situations: 1. MST multiple stream scenario, where multiple streams are sharing the same PHY output. Toggle dpms off for one of the stream doesn't power off the PHY due to the presence of other streams. 2. enable stream failure scenario, where enable stream fails due to failure of link training. This will cause DPMS off is set to false, while the actual PHY power state is off in certain cases. Due to the problematic assumption, the logic will skip disabling other streams for MST multiple stream scenario, therefore PHY is not actually powered off. [how] 1. Rework this refactor by moving PHY state update down to hardware level, where we update PHY state in place when hardware sequencer is actually changing the power state of the PHY hardware. 2. Reimplement symclk on TX off workaround in place when we are actually calling transmitter control to power off PHY in dcn32. Note the workaround is added due to the lack of proper software interface to set TX while keeping symclk on. We plan to address this interface problem so we can set TX off only without affecting symclk in future dcn versions. Fixes: 594b237b9a07 ("drm/amd/display: Add interface to track PHY state") Reviewed-by: Jun Lei Acked-by: Wayne Lin Signed-off-by: Wenjing Liu Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Add dc_ctx to link_enc_create() parameters

2022-07-25T21:17:28+00:00

[Why&How] Preparation to enable run time initialization of register offsets to add dc_context to the link_enc_create callback. This is needed to get the dc_ctx handle where register offset initialization routine is called. Reviewed-by: Rodrigo Siqueira Acked-by: Alan Liu Acked-by: Alex Hung Signed-off-by: Aurabindo Pillai Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Remove FPU operations from dcn201 resources

2022-07-25T21:16:08+00:00

We have some FPU operations on the resource part of the DCN201. This commit drops FPU flags and moves any required FPU code to the DML folder. Reviewed-by: Harry Wentland Acked-by: Alex Hung Signed-off-by: Rodrigo Siqueira Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

amd/display/dc: Fix COLOR_ENCODING and COLOR_RANGE doing nothing for DCN20+

2022-06-21T22:17:24+00:00

For DCN20 and above, the code that actually hooks up the provided input_color_space got lost at some point. Fixes COLOR_ENCODING and COLOR_RANGE doing nothing on DCN20+. Tested using Steam Remote Play Together + gamescope. Update other DCNs the same wasy DCN1.x was updates in commit a1e07ba89d49 ("drm/amd/display: Use plane->color_space for dpp if specified") Fixes: a1e07ba89d49 ("drm/amd/display: Use plane->color_space for dpp if specified") Signed-off-by: Joshua Ashton Signed-off-by: Alex Deucher

drm/amdgpu/display: make FP handling in Makefiles consistent

2022-06-15T01:38:41+00:00

Use the same pattern as the DML Makefile and while we are here add a missing x86 guard around the msse flags for DCN3.2.x. Reviewed-by: Harry Wentland Signed-off-by: Alex Deucher

drm/amd/display: fix if == else warning

2022-04-26T15:51:20+00:00

Fix the following coccicheck warning: drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hwseq.c:98:8-10: WARNING: possible condition with no effect (if == else) Reviewed-by: Zhan Liu Signed-off-by: Guo Zhengkui Signed-off-by: Alex Deucher

drm/amd/display: Add missing prototypes to dcn201_init

2022-02-23T19:03:20+00:00

Include the header with the prototype to silence the following clang warning: drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_init.c:127:6: warning: no previous prototype for function 'dcn201_hw_sequencer_construct' [-Wmissing-prototypes] void dcn201_hw_sequencer_construct(struct dc *dc) ^ Signed-off-by: Maíra Canal Signed-off-by: Alex Deucher

drm/amd/display: fix dereference before NULL check

2021-12-30T13:54:45+00:00

The "plane_state" pointer was access before checking if it was NULL. Avoid a possible NULL pointer dereference by accessing the plane address after the check. Addresses-Coverity-ID: 1493892 ("Dereference before null check") Fixes: 3f68c01be9a22 ("drm/amd/display: add cyan_skillfish display support") Signed-off-by: José Expósito Reviewed-by: Harry Wentland Signed-off-by: Alex Deucher

drm/amd/display: Changed pipe split policy to allow for multi-display pipe split

2021-12-30T13:54:44+00:00

[WHY] Current implementation of pipe split policy prevents pipe split with multiple displays connected, which caused the MCLK speed to be stuck at max [HOW] Changed the pipe split policies so that pipe split is allowed for multi-display configurations Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1522 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1709 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1655 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1403 Tested-by: Daniel Wheeler Reviewed-by: Aric Cyr Acked-by: Rodrigo Siqueira Signed-off-by: Angus Wang Signed-off-by: Alex Deucher