kernel/linux.git/drivers/gpu/drm/amd/display/dc/dce, branch v4.19.39

drm/amd/display: Raise dispclk value for dce120 by 15%

2018-11-21T08:19:10+00:00

[ Upstream commit 481f576c6c21bf0446eaa23623ef0262e9a5387c ] [Why] The DISPCLK value was previously requested to be 15% higher for all ASICs that went through the dce110 bandwidth code path. As part of a refactoring of dce_clocks and the dce110 set bandwidth codepath this was removed for power saving considerations. That change caused display corruption under certain hardware configurations with Vega10. [How] The 15% DISPCLK increase is brought back but only on dce110 for now. This is should be a temporary workaround until the root cause is sorted out for why this occurs on Vega (or other ASICs, if reported). Tested-by: Nick Sarnie Signed-off-by: Nicholas Kazlauskas Reviewed-by: Harry Wentland Acked-by: Bhawanpreet Lakha Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin Signed-off-by: Greg Kroah-Hartman

Revert "drm/amdgpu/display: Replace CONFIG_DRM_AMD_DC_DCN1_0 with CONFIG_X86"

2018-08-21T19:32:28+00:00

This reverts commit 8624c3c4dbfe24fc6740687236a2e196f5f4bfb0. We need CONFIG_DRM_AMD_DC_DCN1_0 to guard code that is using fp math. Acked-by: Alex Deucher Reviewed-by: Michel Dänzer Signed-off-by: Leo (Sunpeng) Li Signed-off-by: Alex Deucher

drm/amd/display: fix dentist did ranges

2018-08-21T19:16:43+00:00

Dentist did ranges were incomplete as max setting has an unusual divider step up of 66. Signed-off-by: Dmytro Laktyushkin Reviewed-by: Charlene Liu Acked-by: Bhawanpreet Lakha Signed-off-by: Alex Deucher

drm/amd/display: Pass connector id when executing VBIOS CT

2018-08-13T22:29:37+00:00

[why] Older ASICs require both phys_id and connector_id to execute bios command table. If we are not passing the right connector_id - it can lead to a black screen. [how] Set connector_obj_id when executing vbios command table Signed-off-by: Mikita Lipski Reviewed-by: Hersen Wu Acked-by: Leo Li Signed-off-by: Alex Deucher Cc: stable@vger.kernel.org

drm/amd/display: display connected to dp-1 does not light up

2018-08-06T20:57:51+00:00

[why] for vega, dp set_panel_mode is handled by psp firmware. dal should not program the register again. [how] dal does not program panel mode. Signed-off-by: Hersen Wu Reviewed-by: Charlene Liu Acked-by: Bhawanpreet Lakha Signed-off-by: Alex Deucher

drm/amd/display: program display clock on cache match

2018-08-06T20:57:12+00:00

[Why] We seem to have an issue where high enough display clock will not get set properly during S3 resume if we only call vbios once [How] Expand condition of display clock programming to happen even when cached display clock matches requested display clock Signed-off-by: Dmytro Laktyushkin Reviewed-by: Tony Cheng Acked-by: Bhawanpreet Lakha Signed-off-by: Alex Deucher

drm/amd/display: Use calculated disp_clk_khz value for dce110

2018-08-06T19:35:25+00:00

[Why] The calculated values for actual disp_clk_khz were ignored when notifying pplib of the new display requirements. In order to honor DFS bypass clocks from the hardware, the calculated value should be used. [How] The return value for set_dispclk is now assigned back into new_clocks and correctly carried through into dccg->clks.phyclk_khz. When notifying pplib of new display requirements dccg->clks.phyclk_khz is used instead of dce.dispclk_khz. The value of dce.dispclk_khz was never explicitly set to anything before. A 15% higher display clock value than calculated is no longer requested for dce110 since it now makes use of the calculated value. Since dce112 makes use of dce110's set_bandwidth but not its update_clocks it needs to have the value correctly carried through. Signed-off-by: Nicholas Kazlauskas Reviewed-by: Harry Wentland Reviewed-by: Dmytro Laktyushkin Acked-by: Bhawanpreet Lakha Signed-off-by: Alex Deucher

drm/amd/display: Prevent PSR from being enabled if initialization fails

2018-07-27T14:07:43+00:00

[Why] PSR_SET command is sent to the microcontroller in order to initialize parameters needed for PSR feature, such as telling the microcontroller which pipe is driving the PSR supported panel. When this command is skipped or fails, the microcontroller may program the wrong thing if driver tries to enable PSR. [How] If PSR_SET fails, do not set psr_enable flag to indicate the feature is not yet initialized. Signed-off-by: Anthony Koo Reviewed-by: Aric Cyr Acked-by: Bhawanpreet Lakha Signed-off-by: Alex Deucher

drm/amd/display: flatten aux_engine and engine

2018-07-27T14:07:42+00:00

[Why] engine and aux_engine are unnecessary layers we want to remove this layer. [How] flatten engine and aux engine structs into one struct called aux_engine and remove all references to the engine struct. Signed-off-by: Bhawanpreet Lakha Reviewed-by: Harry Wentland Acked-by: Bhawanpreet Lakha Signed-off-by: Alex Deucher

drm/amd/display: separate dc_debug into dc_debug_options and dc_debug data

2018-07-24T20:15:59+00:00

[why] confusing as to which part of debug is informational, and which part causes behavioral change Signed-off-by: Jun Lei Reviewed-by: Tony Cheng Acked-by: Leo Li Signed-off-by: Alex Deucher