kernel/linux.git/drivers/gpu/drm/amd/display/dc/dc_stream.h, branch linux-7.0.y

drm/amd/display: Implementing ramless idle mouse trigger

2026-02-19T17:16:10+00:00

[Why & How] Adding mouse trigger in dc_stream to recover from low refresh rate idle state upon mouse movement without vsync interrupts. Reviewed-by: Aric Cyr Signed-off-by: Muaaz Nisar Signed-off-by: Ray Wu Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Add CRC 32-bit mode support for DCN3.6+

2026-02-03T21:43:12+00:00

[Why] DCN 3.6+ hardware supports CRC-32 polynomial in addition to the legacy CRC-16. Enable 32-bit CRC values per color component for improvement of precision in display validation. [How] When userspace sets crc_poly_mode (0=CRC-16, 1=CRC-32) via the debugfs interface, the value is stored in dm_irq_params.crc_poly_mode. When CRC source configuration triggers amdgpu_dm_crtc_configure_crc_source(), crc_poly_mode is retrieved from dm_irq_params and passed to dc_stream_configure_crc(). In the DC layer, dc_stream_configure_crc() sets crc_poly_mode into the crc_params structure and passes it to optc35_configure_crc(). If the hardware supports the OTG_CRC_POLY_SEL register, the register is programmed to select CRC-16 or CRC-32 polynomial. When reading CRC values, optc35_get_crc() checks whether CRC32 register masks are available. If present, it reads 32-bit CRC values from OTG_CRC0/1_DATA_R32/G32/B32 registers; otherwise, it falls back to reading 16-bit CRC values from legacy OTG_CRC0/1_DATA_RG/B registers. Reviewed-by: ChiaHsuan Chung Signed-off-by: Chenyu Chen Signed-off-by: Wayne Lin Tested-by: Dan Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Split update_planes_and_stream_v3 into parts (V2)

2025-12-16T18:26:09+00:00

[Why] Currently all of the preparation and execution of plane update is done under a DC lock, blocking other code from accessing DC for longer than strictly necessary. [How] Break the v3 update flow into 3 parts: * prepare - locked, calculate update flow and modify DC state * execute - unlocked, program hardware * cleanup - locked, finalize DC state and free temp resources Legacy v2 flow too compilicated to break down for now, link new API with old by executing everything in slightly misnamed prepare stage. V2: Keep the new code structure, but point all users back at the old code, until fully tested. Reviewed-by: Nicholas Kazlauskas Signed-off-by: Dominik Kaszewski Signed-off-by: Roman Li Signed-off-by: Chenyu Chen Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Make observers const-correct

2025-10-28T13:58:25+00:00

[Why] Observers which do not modify their pointer arguments should take them as const. This clearly signals their intent to the caller, making it clear that the function is safe to call multiple times, or remove the call if the result is no longer necessary. [How] Made const-correct all of the functions below: * full_update_required[_weak] * fast_updates_exist * fast_update_only * dc_can_clear_cursor_limit * dc_stream_get_status (added const named overload) Reviewed-by: Nicholas Kazlauskas Signed-off-by: Dominik Kaszewski Signed-off-by: Wayne Lin Tested-by: Dan Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Add lock descriptor to check_update

2025-10-28T13:58:22+00:00

[Why] DM locks the global DC lock during all updates, even if multiple updates touch different resources and could be run in parallel. [How] Add extra enum specifying which kind of resources should be locked. Reviewed-by: Aric Cyr Signed-off-by: Dominik Kaszewski Signed-off-by: Wayne Lin Tested-by: Dan Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Remove dc param from check_update

2025-10-28T13:57:54+00:00

[Why] dc_check_update_surfaces_for_stream should not have access to entire DC, especially not a mutable one. Concurrent checks should be able to run independently of one another, without risk of changing state. [How] * Replace dc and stream_status structs with new dc_check_config. * Move required fields from dc_debug and dc_caps to dc_check_config. Reviewed-by: Nicholas Kazlauskas Signed-off-by: Dominik Kaszewski Signed-off-by: Wayne Lin Tested-by: Dan Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Add AVI infoframe copy in copy_stream_update_to_stream

2025-09-23T14:26:33+00:00

[WHY] Ensure AVI infoframe updates from stream updates are applied to the active stream so OS overrides are not lost. [HOW] Copy avi_infopacket to stream when valid flag is set. Follow existing infopacket copy pattern and perform a basic validity check before assignment. Reviewed-by: Aric Cyr Signed-off-by: Karthi Kandasamy Signed-off-by: Ivan Lipski Tested-by: Dan Wheeler Signed-off-by: Alex Deucher

drm/amd/display: MPC basic allocation logic and TMZ

2025-07-15T18:07:51+00:00

[WHY & HOW] Adding basic logic to allocate unused RMCM block and TMZ support. Reviewed-by: Krunoslav Kovac Signed-off-by: Yihan Zhu Signed-off-by: Ivan Lipski Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Refactor SubVP cursor limiting logic

2025-05-05T16:58:49+00:00

[WHY] There are several gaps that can result in SubVP being enabled with incompatible HW cursor sizes, and unjust restrictions to cursor size due to wrong predictions on future usage of SubVP. [HOW] - remove "prediction" logic in favor of tagging based on previous SubVP usage - block SubVP if current HW cursor settings are incompatible - provide interface for DM to determine if HW cursor should be disabled due to an attempt to enable SubVP Reviewed-by: Alvin Lee Signed-off-by: Dillon Varone Signed-off-by: Ray Wu Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

Revert "drm/amd/display: Refactor SubVP cursor limiting logic"

2025-05-05T16:55:35+00:00

This reverts commit 19e743f0fb73 ("drm/amd/display: Refactor SubVP cursor limiting logic") Reason for revert: Corruption Reviewed-by: Alvin Lee Signed-off-by: Ryan Seto Signed-off-by: Ray Wu Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher