<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpu/drm/amd/display/dc/dc.h, branch linux-7.0.y</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=linux-7.0.y</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=linux-7.0.y'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2026-05-23T11:09:33+00:00</updated>
<entry>
<title>drm/amd/display: Allow embedded connectors without DDC</title>
<updated>2026-05-23T11:09:33+00:00</updated>
<author>
<name>Timur Kristóf</name>
<email>timur.kristof@gmail.com</email>
</author>
<published>2026-04-28T11:40:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=31554fda73e5d36745b72a7cb688d431cc4fdfcf'/>
<id>urn:sha1:31554fda73e5d36745b72a7cb688d431cc4fdfcf</id>
<content type='text'>
[ Upstream commit 494941aa772dab79251543764db6cd14bd337e43 ]

On some laptops, the embedded panel may not have
a DDC (display data channel) available. On these,
the EDID may be hardcoded in ACPI or the VBIOS.

In this case, use GPIO_DDC_LINE_UNKNOWN and don't fail.

Fixes: def3488eb0fd ("drm/amd/display: refactor HPD to increase flexibility")
Link: https://gitlab.freedesktop.org/drm/amd/-/work_items/5192
Signed-off-by: Timur Kristóf &lt;timur.kristof@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit 75b8a6ca0e8bc3ce24572f854e95f8721b321179)
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Disable SR feature on eDP1 by default</title>
<updated>2026-02-19T17:16:10+00:00</updated>
<author>
<name>Charlene Liu</name>
<email>Charlene.Liu@amd.com</email>
</author>
<published>2026-02-03T01:34:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c6e2639cdcf07810dcd56c64ab1aeccaa5877035'/>
<id>urn:sha1:c6e2639cdcf07810dcd56c64ab1aeccaa5877035</id>
<content type='text'>
[Why &amp; How]
Disable SR feature on eDP1 by default.

Reviewed-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Signed-off-by: Charlene Liu &lt;Charlene.Liu@amd.com&gt;
Signed-off-by: Ray Wu &lt;ray.wu@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Promote DC to 3.2.369</title>
<updated>2026-02-12T20:16:26+00:00</updated>
<author>
<name>Taimur Hassan</name>
<email>Syed.Hassan@amd.com</email>
</author>
<published>2026-01-30T23:35:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=1778a64f9bea4173f8eb3767d6f385c51fd09bf8'/>
<id>urn:sha1:1778a64f9bea4173f8eb3767d6f385c51fd09bf8</id>
<content type='text'>
This version brings along following update:
-Fix system resume lag issue
-Correct hubp GfxVersion verification
-Add parse all extension blocks for VSDB
-Increase DCN35 SR enter/exit latency
-Refactor virtual directory reorganize encoder and hwss files
-Set enable_legacy_fast_update to false for DCN36
-Have dm_atomic_state context aligned with dc_state current
-Avoid updating surface with the same surface under MPO

Acked-by: Wayne Lin &lt;wayne.lin@amd.com&gt;
Signed-off-by: Taimur Hassan &lt;Syed.Hassan@amd.com&gt;
Signed-off-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Promote DC to 3.2.368</title>
<updated>2026-02-03T21:43:44+00:00</updated>
<author>
<name>Taimur Hassan</name>
<email>Syed.Hassan@amd.com</email>
</author>
<published>2026-01-24T03:39:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=4a0f94dfef34745a380a93b3a764d82e0ff840f4'/>
<id>urn:sha1:4a0f94dfef34745a380a93b3a764d82e0ff840f4</id>
<content type='text'>
This version brings along following fixes:
- Migrate DCCG register access from hwseq to dccg component.
- Add lpddr5 handling to dml2.1
- Correct external pr fsm control
- Make DCN35 OTG disable w/a reusable
- Make DSC FGCG a DSC block level function
- Make some DCN35 DCCG symbols reusable
- Fix writeback on DCN 3.2+
- Fix IGT link training failure on Replay panel
- Fix system resume lag issue
- Add oem panel config for new features
- Fix IGT ILR link training failure on Replay panel
- Fix a NULL pointer dereference in dcn20_hwseq.c
- Add Gfx Base Case For Linear Tiling Handling
- Migrate DIO registers access from hwseq to dio component.
- Match expected data types
- Add CRC 32-bit mode support for DCN3.6+
- Init DMUB DPIA Only for APU
- DIO memory leak fix.
- Add Handling for gfxversion DcGfxBase

Acked-by: ChiaHsuan Chung &lt;chiahsuan.chung@amd.com&gt;
Signed-off-by: Taimur Hassan &lt;Syed.Hassan@amd.com&gt;
Signed-off-by: Wayne Lin &lt;wayne.lin@amd.com&gt;
Tested-by: Dan Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: External panel replay fsm control</title>
<updated>2026-02-03T21:39:25+00:00</updated>
<author>
<name>Peichen Huang</name>
<email>PeiChen.Huang@amd.com</email>
</author>
<published>2026-01-09T09:04:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=9a42510d6bc75324f1636f8e654d31ff08257a9a'/>
<id>urn:sha1:9a42510d6bc75324f1636f8e654d31ff08257a9a</id>
<content type='text'>
[WHY]
To correctly control external panel replay fsm.

[HOW]
1. External panel replay is 1-A option only now.
2. Update cursor update and dirty rects commands for external
panel replay support.
3. Add external panel replay support flag in dc.

Reviewed-by: Robin Chen &lt;robin.chen@amd.com&gt;
Signed-off-by: Peichen Huang &lt;PeiChen.Huang@amd.com&gt;
Signed-off-by: Wayne Lin &lt;wayne.lin@amd.com&gt;
Tested-by: Dan Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Promote DC to 3.2.367</title>
<updated>2026-01-27T23:11:25+00:00</updated>
<author>
<name>Taimur Hassan</name>
<email>Syed.Hassan@amd.com</email>
</author>
<published>2026-01-17T01:09:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=37e6349e9328feb600568144411c18e3c35e3077'/>
<id>urn:sha1:37e6349e9328feb600568144411c18e3c35e3077</id>
<content type='text'>
* Fw release 0.1.44.0
* Fixes for corruption on platforms older than DCN4x.
* Bug fixes related to USB4 link training
* Fixes related to FP guard
* Debug helpers and other stability fixes.
* Some refactors to improve code quality

Signed-off-by: Taimur Hassan &lt;Syed.Hassan@amd.com&gt;
Signed-off-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Reviewed-by: Alex Hung &lt;alex.hung@amd.com&gt;
Tested-by: Dan Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add debug flag to override min dispclk</title>
<updated>2026-01-27T23:11:10+00:00</updated>
<author>
<name>Michael Strauss</name>
<email>michael.strauss@amd.com</email>
</author>
<published>2026-01-15T16:07:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=5b8cfb0cebf93bd0f8b316084ce0589df8fd57ac'/>
<id>urn:sha1:5b8cfb0cebf93bd0f8b316084ce0589df8fd57ac</id>
<content type='text'>
[WHY]
Enable dynamic ODM testing without needing a valid dispclk table

[HOW]
Create a debug flag to specify an override value for min dispclk

Reviewed-by: Dmytro Laktyushkin &lt;dmytro.laktyushkin@amd.com&gt;
Signed-off-by: Michael Strauss &lt;michael.strauss@amd.com&gt;
Signed-off-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Tested-by: Dan Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Promote DC to 3.2.366</title>
<updated>2026-01-20T22:25:56+00:00</updated>
<author>
<name>Taimur Hassan</name>
<email>Syed.Hassan@amd.com</email>
</author>
<published>2026-01-10T00:34:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=f16a208cfb55dd39deab74957783a19b0130b261'/>
<id>urn:sha1:f16a208cfb55dd39deab74957783a19b0130b261</id>
<content type='text'>
This version brings along the following updates:

 - Update memory QoS measurement interface.
 - Panel inst for monitors.
 - Disable FEC when powering down encoders.
 - Detect panel type from VSDB.
 - Check NULL before accessing a variable.
 - Initialize a default to phyd32clk.
 - Revert "init dispclk from bootup clock".
 - Add IPS residency info to debugfs.
 - Ensure link output is disabled in backend reset for PLL_ON.
 - Remove unused code.
 - Add DMU crash recovery callback to DM.
 - Remove coverity comments.

Signed-off-by: Taimur Hassan &lt;Syed.Hassan@amd.com&gt;
Signed-off-by: Matthew Stewart &lt;matthew.stewart2@amd.com&gt;
Tested-by: Dan Wheeler &lt;daniel.wheeler@amd.com&gt;
Acked-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add DMU crash recovery callback to DM</title>
<updated>2026-01-20T22:25:24+00:00</updated>
<author>
<name>Nicholas Kazlauskas</name>
<email>nicholas.kazlauskas@amd.com</email>
</author>
<published>2026-01-08T19:00:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=443c30f243a3f07c310650f827cb71c2a1d5500b'/>
<id>urn:sha1:443c30f243a3f07c310650f827cb71c2a1d5500b</id>
<content type='text'>
[Why]
To improve reliability of the system in the case of infrequent or
potentially recoverable hangs when the DMU times out.

[How]
Attempt to recover the ASIC when DMU hangs by triggering a crash
recovery callback for the DM to forward to the base driver.

Reviewed-by: Dillon Varone &lt;dillon.varone@amd.com&gt;
Signed-off-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Signed-off-by: Matthew Stewart &lt;matthew.stewart2@amd.com&gt;
Tested-by: Dan Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Detect panel type from VSDB</title>
<updated>2026-01-20T22:19:28+00:00</updated>
<author>
<name>Mario Limonciello (AMD)</name>
<email>superm1@kernel.org</email>
</author>
<published>2026-01-06T03:52:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=0a62732e53d7e295e1733a2d9bf661e593d86675'/>
<id>urn:sha1:0a62732e53d7e295e1733a2d9bf661e593d86675</id>
<content type='text'>
[Why]
The AMD VSDB contains two bits that indicate the type of panel connected.
This can be useful for policy decisions based upon panel technology.

[How]
Read the bits for the panel type when parsing VSDB and store them in
the dc_link.

Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Mario Limonciello (AMD) &lt;superm1@kernel.org&gt;
Signed-off-by: Matthew Stewart &lt;matthew.stewart2@amd.com&gt;
Tested-by: Dan Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
