kernel/linux.git/drivers/gpu/drm/amd/amdgpu, branch linux-4.13.y

drm/amdgpu: allow harvesting check for Polaris VCE

2017-11-08T09:17:17+00:00

commit 32bec2afa525149288e6696079bc85f747fa2138 upstream. Fixes init failures on Polaris cards with harvested VCE blocks. Signed-off-by: Leo Liu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher Signed-off-by: Greg Kroah-Hartman

drm/amdgpu: return -ENOENT from uvd 6.0 early init for harvesting

2017-11-08T09:17:17+00:00

commit cb4b02d7cac56a69d8137d8d843507cca9182aed upstream. Fixes init failures on polaris cards with harvested UVD. Signed-off-by: Leo Liu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher Signed-off-by: Greg Kroah-Hartman

drm/amdgpu: revert tile table update for oland

2017-10-05T07:47:28+00:00

commit 4cf97582b46f123a4b7cd88d999f1806c2eb4093 upstream. Several users have complained that the tile table update broke Oland support. Despite several attempts to fix it, the root cause is still unknown at this point and no solution is available. As it is not acceptable to leave a known regression breaking a major functionality in the kernel for several releases, let's just reverse this optimization for now. It can be implemented again later if and only if the breakage is understood and fixed. As there were no complaints for Hainan so far, only the Oland part of the offending commit is reverted. Optimization is preserved on Hainan, so this commit isn't an actual revert of the original. This fixes bug #194761: https://bugzilla.kernel.org/show_bug.cgi?id=194761 Reviewed-by: Marek Olšák Signed-off-by: Jean Delvare Fixes: f8d9422ef80c ("drm/amdgpu: update tile table for oland/hainan") Cc: Flora Cui Cc: Junwei Zhang Cc: Alex Deucher Cc: Marek Olšák Signed-off-by: Alex Deucher Signed-off-by: Greg Kroah-Hartman

drm/amdgpu: read reg in each iterator of psp_wait_for loop

2017-09-27T12:43:12+00:00

commit 2890decfd9969cac21067ca0c734fbccaf74d634 upstream. v2: fix the SOS loading failure for PSP v3.1 Signed-off-by: Junwei Zhang Acked-by: Alex Deucher (v1) Acked-by: Huang Rui (v1) Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher Signed-off-by: Greg Kroah-Hartman

drm/amdgpu: update to new mmu_notifier semantic

2017-08-31T23:12:59+00:00

Calls to mmu_notifier_invalidate_page() were replaced by calls to mmu_notifier_invalidate_range() and are now bracketed by calls to mmu_notifier_invalidate_range_start()/end() Remove now useless invalidate_page callback. Signed-off-by: Jérôme Glisse Reviewed-by: Christian König Cc: amd-gfx@lists.freedesktop.org Cc: Felix Kuehling Cc: Christian König Cc: Alex Deucher Cc: Kirill A. Shutemov Cc: Andrew Morton Cc: Andrea Arcangeli Signed-off-by: Linus Torvalds

drm/amdgpu: save list length when fence is signaled

2017-08-15T18:10:01+00:00

update the list first to avoid redundant checks. Signed-off-by: Chunming Zhou Reviewed-by: Christian König Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher Cc: stable@vger.kernel.org

drm/amdgpu: Use list_del_init in amdgpu_mn_unregister

2017-08-02T18:29:58+00:00

Otherwise bo->shadow_list (which is aliased by bo->mn_list) will not appear empty in amdgpu_ttm_bo_destroy and cause an oops when freeing former userptr BOs. Signed-off-by: Felix Kuehling Reviewed-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu: Fix undue fallthroughs in golden registers initialization

2017-08-02T18:29:42+00:00

As I was staring at the si_init_golden_registers code, I noticed that the Pitcairn initialization silently falls through the Cape Verde initialization, and the Oland initialization falls through the Hainan initialization. However there is no comment stating that this is intentional, and the radeon driver doesn't have any such fallthrough, so I suspect this is not supposed to happen. Signed-off-by: Jean Delvare Fixes: 62a37553414a ("drm/amdgpu: add si implementation v10") Cc: Ken Wang Cc: Alex Deucher Cc: "Marek Olšák" Cc: "Christian König" Cc: Flora Cui Reviewed-by: Marek Olšák Signed-off-by: Alex Deucher Cc: stable@vger.kernel.org

drm/amdgpu: fix header on gfx9 clear state

2017-07-27T14:01:49+00:00

This got missed when we open sourced this. Reviewed-by: Christian König Signed-off-by: Alex Deucher Cc: stable@vger.kernel.org

drm/amdgpu/gfx9: simplify and fix GRBM index selection

2017-07-25T20:38:15+00:00

Copy the approach taken by gfx8, which simplifies the code, and set the instance index properly. The latter is required for debugging, e.g. for reading wave status by UMR. Signed-off-by: Nicolai Hähnle Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher