<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpu/drm/amd/amdgpu/vi.c, branch v4.11.6</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v4.11.6</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v4.11.6'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2017-03-10T19:25:33+00:00</updated>
<entry>
<title>drm/amd/amdgpu: Disable GFX_PG on Carrizo until compute issues solved</title>
<updated>2017-03-10T19:25:33+00:00</updated>
<author>
<name>Tom St Denis</name>
<email>tom.stdenis@amd.com</email>
</author>
<published>2017-03-09T18:21:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=d8a8ed9758241e138933c67e40db2db2790eca19'/>
<id>urn:sha1:d8a8ed9758241e138933c67e40db2db2790eca19</id>
<content type='text'>
Currently compute jobs will stall if GFX_PG is enabled.  Until this
is resolved we'll disable GFX_PG.

Signed-off-by: Tom St Denis &lt;tom.stdenis@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/amdgpu: post card if there is real hw resetting performed</title>
<updated>2017-02-17T21:12:58+00:00</updated>
<author>
<name>Jim Qu</name>
<email>Jim.Qu@amd.com</email>
</author>
<published>2017-02-10T07:59:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c836fec5ce8eb0d0c08fa0ea5fb71df3290d1601'/>
<id>urn:sha1:c836fec5ce8eb0d0c08fa0ea5fb71df3290d1601</id>
<content type='text'>
Check whether we need to post rather than whether the asic is
posted.  There are some cases (e.g., GPU reset or resume from
hibernate) where we need to force post even if the asic has
been posted.

Signed-off-by: Jim Qu &lt;Jim.Qu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/vi: fix mailbox irq mistake</title>
<updated>2017-01-27T16:13:40+00:00</updated>
<author>
<name>Xiangliang Yu</name>
<email>Xiangliang.Yu@amd.com</email>
</author>
<published>2017-01-18T04:50:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=63d24f8846b0095cbbd94746b6fc8a6acbda8f5e'/>
<id>urn:sha1:63d24f8846b0095cbbd94746b6fc8a6acbda8f5e</id>
<content type='text'>
For virt, freed mailbox irq should be handled in hw fini, not hw
init. Correct it.

Signed-off-by: Xiangliang Yu &lt;Xiangliang.Yu@amd.com&gt;
Reviewed-by: Monk Liu &lt;Monk.Liu@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/vi: add support virtualization</title>
<updated>2017-01-27T16:13:25+00:00</updated>
<author>
<name>Xiangliang Yu</name>
<email>Xiangliang.Yu@amd.com</email>
</author>
<published>2017-01-12T07:22:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=99581cc57387a1a25f44e338e46338c58138fedc'/>
<id>urn:sha1:99581cc57387a1a25f44e338e46338c58138fedc</id>
<content type='text'>
Call VI virtualization functions if device is Vf.

Signed-off-by: Xiangliang Yu &lt;Xiangliang.Yu@amd.com&gt;
Signed-off-by: Monk Liu &lt;Monk.Liu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/virt: use kiq to access registers (v2)</title>
<updated>2017-01-27T16:13:23+00:00</updated>
<author>
<name>Xiangliang Yu</name>
<email>Xiangliang.Yu@amd.com</email>
</author>
<published>2017-01-12T06:29:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=bc992ba5a3c19c79873fab46f17dcb20a9b84a85'/>
<id>urn:sha1:bc992ba5a3c19c79873fab46f17dcb20a9b84a85</id>
<content type='text'>
For virtualization, it is must for driver to use KIQ to access
registers when it is out of GPU full access mode.

v2: agd: rebase

Signed-off-by: Xiangliang Yu &lt;Xiangliang.Yu@amd.com&gt;
Signed-off-by: Monk Liu &lt;Monk.Liu@amd.com&gt;
Reviewed-by: Monk Liu &lt;Monk.Liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: refine vce3.0 initialize.</title>
<updated>2017-01-27T16:13:15+00:00</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2017-01-10T11:54:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=714b1f5371fc4b4d5f49dd1715a595c17871edac'/>
<id>urn:sha1:714b1f5371fc4b4d5f49dd1715a595c17871edac</id>
<content type='text'>
1. disable vce cg when vce hw initialize.
2. initizlize vce clock to 10KHz fo dgpu,
   so no need to set bypass clock to vce.

Change-Id: I934c2c4820cc95c1bfa2fa41ff0f40a0d3cd1c40
Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add get clockgating_state method for vi common</title>
<updated>2017-01-27T16:13:09+00:00</updated>
<author>
<name>Huang Rui</name>
<email>ray.huang@amd.com</email>
</author>
<published>2017-01-05T12:48:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=abd2c2fe1212698ed326d5746e487abecb2ed325'/>
<id>urn:sha1:abd2c2fe1212698ed326d5746e487abecb2ed325</id>
<content type='text'>
Signed-off-by: Huang Rui &lt;ray.huang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/vi: move virtualization detection forward</title>
<updated>2017-01-27T16:13:05+00:00</updated>
<author>
<name>Xiangliang Yu</name>
<email>Xiangliang.Yu@amd.com</email>
</author>
<published>2017-01-09T03:49:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=91caa081378c612030bfa9762fd7d88036508238'/>
<id>urn:sha1:91caa081378c612030bfa9762fd7d88036508238</id>
<content type='text'>
Move the detection forward into vi_set_ip_blocks function, then
add ip blocks virtualization need if device is VF.

V2: add ip blocks according to asic type.

Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Monk Liu &lt;monk.liu@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Xiangliang Yu &lt;Xiangliang.Yu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/virt: rename fieldes of virtualization structure</title>
<updated>2017-01-27T16:13:04+00:00</updated>
<author>
<name>Xiangliang Yu</name>
<email>Xiangliang.Yu@amd.com</email>
</author>
<published>2017-01-09T23:06:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=5a5099cbf4d8e68bde0554cf6f61bd4adf9fa243'/>
<id>urn:sha1:5a5099cbf4d8e68bde0554cf6f61bd4adf9fa243</id>
<content type='text'>
Use acronym to rename fields to make easy to spell out.

Signed-off-by: Xiangliang Yu &lt;Xiangliang.Yu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add drm light sleep support for Vi</title>
<updated>2017-01-27T16:12:46+00:00</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2016-12-08T02:58:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=f6f534e2af5b518f522b5df244accf945a6207ec'/>
<id>urn:sha1:f6f534e2af5b518f522b5df244accf945a6207ec</id>
<content type='text'>
v2: fix copy error.

Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
