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<title>kernel/linux.git/drivers/gpu/drm/amd/amdgpu/soc15d.h, branch linux-6.9.y</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=linux-6.9.y</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=linux-6.9.y'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2022-12-02T15:04:45+00:00</updated>
<entry>
<title>drm/amdgpu: Modify unmap_queue format for gfx9 (v6)</title>
<updated>2022-12-02T15:04:45+00:00</updated>
<author>
<name>Jiadong.Zhu</name>
<email>Jiadong.Zhu@amd.com</email>
</author>
<published>2022-07-13T09:30:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=be2545506476b3e6c3a1df11892ed10ca4246eb7'/>
<id>urn:sha1:be2545506476b3e6c3a1df11892ed10ca4246eb7</id>
<content type='text'>
1. Modify the unmap_queue package on gfx9. Add trailing fence to track the
   preemption done.
2. Modify emit_ce_meta emit_de_meta functions for the resumed ibs.

v2: Restyle code not to use ternary operator.
v3: Modify code format.
v4: Enable Mid-Command Buffer Preemption for gfx9 by default.
v5: Optimize the flag bit set for emit_fence.
v6: Modify log message for preemption timeout.

Cc: Christian Koenig &lt;Christian.Koenig@amd.com&gt;
Cc: Michel Dänzer &lt;michel@daenzer.net&gt;
Cc: Luben Tuikov &lt;Luben.Tuikov@amd.com&gt;
Signed-off-by: Jiadong.Zhu &lt;Jiadong.Zhu@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Acked-by: Huang Rui &lt;ray.huang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add AQUIRE_MEM PACKET3 fields defintion</title>
<updated>2020-05-14T20:42:43+00:00</updated>
<author>
<name>Andrey Grodzovsky</name>
<email>andrey.grodzovsky@amd.com</email>
</author>
<published>2020-03-24T20:39:37+00:00</published>
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<id>urn:sha1:73339a71547c07f7c28d0b48ad06591f8c4433d8</id>
<content type='text'>
Add this for gfx10 and gfx9.

v2: Fix identation

Signed-off-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Reviewed-by: Luben Tuikov &lt;luben.tuikov@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add tmz bit in frame control packet</title>
<updated>2020-04-28T20:20:28+00:00</updated>
<author>
<name>Huang Rui</name>
<email>ray.huang@amd.com</email>
</author>
<published>2019-08-08T09:00:16+00:00</published>
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<id>urn:sha1:eda982a67225a8fe46807dc45304469f612e99bb</id>
<content type='text'>
This patch adds tmz bit in frame control pm4 packet, and it will used in future.

Signed-off-by: Huang Rui &lt;ray.huang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add jpeg packet defines to soc15d.h</title>
<updated>2018-06-15T17:20:34+00:00</updated>
<author>
<name>Boyuan Zhang</name>
<email>boyuan.zhang@amd.com</email>
</author>
<published>2018-04-30T20:51:33+00:00</published>
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<id>urn:sha1:d521093a5f84cacf9935e8c9834ad3054b423ee1</id>
<content type='text'>
Add new packet for vcn jpeg, including condition checks, types and packet

Signed-off-by: Boyuan Zhang &lt;boyuan.zhang@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'drm-next-4.18' of git://people.freedesktop.org/~agd5f/linux into drm-next</title>
<updated>2018-05-15T22:31:29+00:00</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@redhat.com</email>
</author>
<published>2018-05-15T22:21:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=95d2c3e15da613afd53b4b8f2cdb352dc7d12221'/>
<id>urn:sha1:95d2c3e15da613afd53b4b8f2cdb352dc7d12221</id>
<content type='text'>
Main changes for 4.18.  I'd like to do a separate pull for vega20 later
this week or next.  Highlights:
- Reserve pre-OS scanout buffer during init for seemless transition from
  console to driver
- VEGAM support
- Improved GPU scheduler documentation
- Initial gfxoff support for raven
- SR-IOV fixes
- Default to non-AGP on PowerPC for radeon
- Fine grained clock voltage control for vega10
- Power profiles for vega10
- Further clean up of powerplay/driver interface
- Underlay fixes
- Display link bw updates
- Gamma fixes
- Scatter/Gather display support on CZ/ST
- Misc bug fixes and clean ups

[airlied: fixup v3d vs scheduler API change]

Link: https://patchwork.freedesktop.org/patch/msgid/20180515185450.1113-1-alexander.deucher@amd.com
Signed-off-by: Dave Airlie &lt;airlied@redhat.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: optionally do a writeback but don't invalidate TC for IB fences</title>
<updated>2018-05-15T18:43:32+00:00</updated>
<author>
<name>Marek Olšák</name>
<email>marek.olsak@amd.com</email>
</author>
<published>2018-04-03T17:05:03+00:00</published>
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<id>urn:sha1:d240cd9eddd943dbe0267d081697195ff1e90b65</id>
<content type='text'>
There is a new IB flag that enables this new behavior.
Full invalidation is unnecessary for RELEASE_MEM and doesn't make sense
when draw calls from two adjacent gfx IBs run in parallel. This will be
the new default for Mesa.

v2: bump the version

Signed-off-by: Marek Olšák &lt;marek.olsak@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add GFXv9 TLB invalidation packet definition</title>
<updated>2018-04-10T21:33:00+00:00</updated>
<author>
<name>Felix Kuehling</name>
<email>Felix.Kuehling@amd.com</email>
</author>
<published>2018-04-10T21:33:00+00:00</published>
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<id>urn:sha1:ab88bded7522dafc1a6beb251092365519a01c4e</id>
<content type='text'>
Signed-off-by: Shaoyun Liu &lt;Shaoyun.Liu@amd.com&gt;
Signed-off-by: Jay Cornwall &lt;Jay.Cornwall@amd.com&gt;
Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Reviewed-by: Oded Gabbay &lt;oded.gabbay@gmail.com&gt;
Signed-off-by: Oded Gabbay &lt;oded.gabbay@gmail.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fix vega10 graphic hang issue in S3 test</title>
<updated>2017-08-18T16:02:11+00:00</updated>
<author>
<name>Ken Wang</name>
<email>Ken.Wang@amd.com</email>
</author>
<published>2017-08-15T09:16:08+00:00</published>
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<id>urn:sha1:d5de797ff1c91157ddefd7102aaf5f87ff222746</id>
<content type='text'>
mmVGT_INDEX_TYPE has no default value, need to make sure
it's initialized when gfx is initialized.

Signed-off-by: Ken Wang &lt;Ken.Wang@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/gfx9: move define to header file</title>
<updated>2017-05-24T21:40:29+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2017-05-04T14:32:33+00:00</published>
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<id>urn:sha1:67fb56a6dde9bddd3a57614607af255bbb732118</id>
<content type='text'>
rather than defining it locally.

Reviewed-by: Junwei Zhang &lt;Jerry.Zhang@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu:new PM4 entry for VI/AI</title>
<updated>2017-05-24T21:40:26+00:00</updated>
<author>
<name>Monk Liu</name>
<email>Monk.Liu@amd.com</email>
</author>
<published>2017-05-01T09:23:44+00:00</published>
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<id>urn:sha1:d951eeddface8bcdcb4fd95066801abface55c21</id>
<content type='text'>
TMZ package will be used for VULKAN/CHAINED-IB MCBP

Signed-off-by: Monk Liu &lt;Monk.Liu@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
