kernel/linux.git/drivers/gpu/drm/amd/amdgpu/si_enums.h, branch linux-7.0.y

drm/amdgpu: continue cleaning up sid.h and si_enums.h

2025-04-07T19:18:34+00:00

Remove more duplicated defines and move some in sid.h for coherence with CIK. Signed-off-by: Alexandre Demers Signed-off-by: Alex Deucher

drm/amdgpu: move DCE6 away from sid.h and si_enums.h defines

2025-04-07T19:18:33+00:00

This cleans up DCE6. I added some minor tweaks taken from CIK to exit early v2: minor fixes (Alex) Signed-off-by: Alexandre Demers Signed-off-by: Alex Deucher

drm/amdgpu: remove PACKET3 duplicated defines from si_enums.h

2025-04-07T19:18:32+00:00

PACKET3 is already in sid.h, as it is done under cikd.h for CIK Signed-off-by: Alexandre Demers Signed-off-by: Alex Deucher

drm/amdgpu: use proper defines, shifts and masks in DCE6 code

2025-04-07T19:18:32+00:00

By replacing VGA_VSTATUS_CNTL by VGA_RENDER_CONTROL__VGA_VSTATUS_CNTL_MASK, we also need to fix its usage in GMC6. Note: VGA_VSTATUS_CNTL's binary value was inverted in dce_6_0_sh_mask.h, so we need to invert its value where it was used. Signed-off-by: Alexandre Demers Signed-off-by: Alex Deucher

drm/amdgpu: move GFX6 defines into gfx_v6_0.c

2025-04-07T19:18:32+00:00

Send a few GFX6 defines where it's used in GFX6. Signed-off-by: Alexandre Demers Signed-off-by: Alex Deucher

drm/amdgpu: finish wiring up sid.h in DCE6

2025-03-11T16:37:07+00:00

For coherence with DCE8 et DCE10, add or move some values under sid.h and remove duplicated from si_enums.h. Signed-off-by: Alexandre Demers Signed-off-by: Alex Deucher

drm/amdgpu: fix SI's GB_ADDR_CONFIG_GOLDEN values and wire up sid.h in GFX6

2025-03-11T16:36:48+00:00

By wiring up sid.h in GFX6, we end up with a few duplicated defines such as the golden registers. Let's clean this up. [TAHITI,VERDE, HAINAN]_GB_ADDR_CONFIG_GOLDEN were defined both in sid.h and under si_enums.h, with different values. Keep the values used under radeon and move them under gfx_v6_0.c where they are used (as it is done under cik) Signed-off-by: Alexandre Demers Signed-off-by: Alex Deucher

drm/amdgpu: Clean up KFD VMID assignment

2020-07-02T16:02:50+00:00

The KFD VMID assignment was hard-coded in a few places. Consolidate that in a single variable adev->vm_manager.first_kfd_vmid. The value is still assigned in gmc-ip-version-specific code. Signed-off-by: Felix Kuehling Reviewed-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu: enable ABGR and XBGR formats (v2)

2018-08-27T16:10:19+00:00

Add support for DRM_FORMAT_{A,X}BGR8888 in amdgpu with amd dc disabled (v2) Crossbar registers are defined and used to swap red and blue channels, keeping the existing coding style in each of the dce modules. After setting crossbar bits in fb_swap, use bitwise OR for big endian where required in DCE6 and DCE8 which do not rely on REG_SET_FIELD() Signed-off-by: Mauro Rossi Signed-off-by: Alex Deucher

drm/amdgpu: update HAINAN_GB_ADDR_CONFIG_GOLDEN

2017-02-08T22:25:02+00:00

Signed-off-by: Flora Cui Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher