<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpu/drm/amd/amdgpu/si.c, branch v6.19.11</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.19.11</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.19.11'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2025-11-12T02:54:19+00:00</updated>
<entry>
<title>drm/amdgpu/vce1: Workaround PLL timeout on FirePro W9000</title>
<updated>2025-11-12T02:54:19+00:00</updated>
<author>
<name>Timur Kristóf</name>
<email>timur.kristof@gmail.com</email>
</author>
<published>2025-11-07T15:57:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=baefc7cdac82e39fac31818ecc799a6b9b14a312'/>
<id>urn:sha1:baefc7cdac82e39fac31818ecc799a6b9b14a312</id>
<content type='text'>
Sometimes the VCE PLL times out waiting for CTLACK/CTLACK2.
When it happens, the VCE still works, but much slower.
Observed on a Tahiti GPU, but not all:
- FirePro W9000 has the issue
- Radeon R9 280X not affected
- Radeon HD 7990 not affected

As a workaround, on the affected chip just don't put the
VCE PLL in sleep mode. Leaving the VCE PLL in bypass mode
or reset mode both work. Using bypass mode is simpler.

Signed-off-by: Timur Kristóf &lt;timur.kristof@gmail.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/vce1: Enable VCE1 on Tahiti, Pitcairn, Cape Verde GPUs</title>
<updated>2025-11-12T02:54:18+00:00</updated>
<author>
<name>Timur Kristóf</name>
<email>timur.kristof@gmail.com</email>
</author>
<published>2025-11-07T15:57:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=eabc71661f01c74e5da3182b268170626e8bd290'/>
<id>urn:sha1:eabc71661f01c74e5da3182b268170626e8bd290</id>
<content type='text'>
Add the VCE1 IP block to the SI GPUs that have it.
Advertise the encoder capabilities corresponding to VCE1,
so the userspace applications can detect and use it.

Signed-off-by: Timur Kristóf &lt;timur.kristof@gmail.com&gt;
Co-developed-by: Alexandre Demers &lt;alexandre.f.demers@gmail.com&gt;
Signed-off-by: Alexandre Demers &lt;alexandre.f.demers@gmail.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: still cleanup sid.h</title>
<updated>2025-04-08T20:48:14+00:00</updated>
<author>
<name>Alexandre Demers</name>
<email>alexandre.f.demers@gmail.com</email>
</author>
<published>2025-04-07T05:52:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=9cfb23021023f2e6c12fabe92bb666277843279f'/>
<id>urn:sha1:9cfb23021023f2e6c12fabe92bb666277843279f</id>
<content type='text'>
The defines, shifts and masks are already available in dce_6_0_d.h,
dce_6_0_sh_mask.h.

Signed-off-by: Alexandre Demers &lt;alexandre.f.demers@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: move si.c away from sid.h</title>
<updated>2025-04-07T19:18:59+00:00</updated>
<author>
<name>Alexandre Demers</name>
<email>alexandre.f.demers@gmail.com</email>
</author>
<published>2025-03-28T05:10:17+00:00</published>
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<id>urn:sha1:d3cd9565c6269c39cf812eaed25071e537c1eb5d</id>
<content type='text'>
Replace defines by the ones added earlier to GFX6, SMU6 and DCE6

Signed-off-by: Alexandre Demers &lt;alexandre.f.demers@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: move si_dma.c away from sid.h and si_enums.h</title>
<updated>2025-04-07T19:18:33+00:00</updated>
<author>
<name>Alexandre Demers</name>
<email>alexandre.f.demers@gmail.com</email>
</author>
<published>2025-03-22T01:46:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=14f15aa054419ecd3a2578822958f87a84142bee'/>
<id>urn:sha1:14f15aa054419ecd3a2578822958f87a84142bee</id>
<content type='text'>
Replace defines for the ones in oss_1_0_d.h and oss_1_0_sh_mask.h

Taking the opportunity to add some comments taken from cik_sdma.c

Signed-off-by: Alexandre Demers &lt;alexandre.f.demers@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: wire up defines, shifts and masks through SI code</title>
<updated>2025-04-07T19:18:32+00:00</updated>
<author>
<name>Alexandre Demers</name>
<email>alexandre.f.demers@gmail.com</email>
</author>
<published>2025-03-22T01:46:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=de81b86e965e778533d9e7db6f4fe6451fb37974'/>
<id>urn:sha1:de81b86e965e778533d9e7db6f4fe6451fb37974</id>
<content type='text'>
To be able to remove as much duplicated defines, the different files
containing definitions, shifts and masks must be properly included.

Once done, the code will be migrated where needed to shifts and masks and
proper defines, before removing useless defines in the end.

Signed-off-by: Alexandre Demers &lt;alexandre.f.demers@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: prepare DCE6 uniformisation with DCE8 and DCE10</title>
<updated>2025-03-11T16:36:42+00:00</updated>
<author>
<name>Alexandre Demers</name>
<email>alexandre.f.demers@gmail.com</email>
</author>
<published>2025-03-09T16:48:50+00:00</published>
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<id>urn:sha1:20fb56dfd8d20ae4406007d0601fa024d24a3301</id>
<content type='text'>
Let's begin the cleanup in sid.h to prevent warnings and errors when wiring
sid.h into dce_v6_0.c.

This is a bigger cleanup.
Many defines found under sid.h have already been properly moved
into the different "_d.h" and "_sh_mask.h", so they should have been
already removed from sid.h and properly linked in where needed.

Signed-off-by: Alexandre Demers &lt;alexandre.f.demers@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fix spelling typos in SI</title>
<updated>2025-03-05T15:37:23+00:00</updated>
<author>
<name>Alexandre Demers</name>
<email>alexandre.f.demers@gmail.com</email>
</author>
<published>2025-02-27T05:05:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=899634a57abcbdd62367db6194623b13372d9da8'/>
<id>urn:sha1:899634a57abcbdd62367db6194623b13372d9da8</id>
<content type='text'>
Fix typos

Signed-off-by: Alexandre Demers &lt;alexandre.f.demers@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: update the handle ptr in is_idle</title>
<updated>2025-02-25T16:43:58+00:00</updated>
<author>
<name>Sunil Khatri</name>
<email>sunil.khatri@amd.com</email>
</author>
<published>2025-02-19T18:10:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=7dc340540363a008cee1e160e8f2a4f034f196d4'/>
<id>urn:sha1:7dc340540363a008cee1e160e8f2a4f034f196d4</id>
<content type='text'>
Update the *handle to amdgpu_ip_block ptr for all
functions pointers of is_idle.

Signed-off-by: Sunil Khatri &lt;sunil.khatri@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: pass ip_block in set_clockgating_state</title>
<updated>2024-12-10T15:26:47+00:00</updated>
<author>
<name>Boyuan Zhang</name>
<email>boyuan.zhang@amd.com</email>
</author>
<published>2024-10-07T23:43:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=f2ba8c3d510695c68ede786b3a37a9aa170ddfae'/>
<id>urn:sha1:f2ba8c3d510695c68ede786b3a37a9aa170ddfae</id>
<content type='text'>
Pass ip_block instead of adev in set_clockgating_state() callback
functions. Modify set_clockgating_state()for all correspoding ip blocks.

v2: remove all changes for is_idle(), remove type casting

Signed-off-by: Boyuan Zhang &lt;boyuan.zhang@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Sunil Khatri &lt;sunil.khatri@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
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