<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpu/drm/amd/amdgpu/nv.c, branch linux-5.9.y</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=linux-5.9.y</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=linux-5.9.y'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2020-11-10T11:39:05+00:00</updated>
<entry>
<title>drm/amdgpu: disable DCN and VCN for navi10 blockchain SKU(v3)</title>
<updated>2020-11-10T11:39:05+00:00</updated>
<author>
<name>Tianci.Yin</name>
<email>tianci.yin@amd.com</email>
</author>
<published>2020-10-22T03:40:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=f2cc04437f6c399b2c314b289ad9f9d87afa33c8'/>
<id>urn:sha1:f2cc04437f6c399b2c314b289ad9f9d87afa33c8</id>
<content type='text'>
[ Upstream commit a305e7dc5fa86ff9cf6cd2da30215a92d43c9285 ]

The blockchain SKU has no display and video support, remove them.

Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Tianci.Yin &lt;tianci.yin@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: use MODE1 reset for navy_flounder by default</title>
<updated>2020-08-26T19:45:51+00:00</updated>
<author>
<name>Jiansong Chen</name>
<email>Jiansong.Chen@amd.com</email>
</author>
<published>2020-08-25T07:39:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=75947544c8abd380064c817e2a2f043914d49e55'/>
<id>urn:sha1:75947544c8abd380064c817e2a2f043914d49e55</id>
<content type='text'>
Switch default gpu reset method to MODE1 for navy_flounder.

Signed-off-by: Jiansong Chen &lt;Jiansong.Chen@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: use mode1 reset by default for sienna_cichlid</title>
<updated>2020-08-07T21:47:25+00:00</updated>
<author>
<name>Likun Gao</name>
<email>Likun.Gao@amd.com</email>
</author>
<published>2020-08-06T09:37:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=f2e2573c0823c07dc8aac4a8e0947881af2340bd'/>
<id>urn:sha1:f2e2573c0823c07dc8aac4a8e0947881af2340bd</id>
<content type='text'>
Swith default gpu reset method for sienna_cichlid to MODE1 reset.

Signed-off-by: Likun Gao &lt;Likun.Gao@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: expand sienna chichlid reg access  support</title>
<updated>2020-08-06T20:23:20+00:00</updated>
<author>
<name>John Clements</name>
<email>john.clements@amd.com</email>
</author>
<published>2020-07-22T01:40:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=ebfbd1c2ca02f1c1bc9f8f0a7783e71efb57e4cc'/>
<id>urn:sha1:ebfbd1c2ca02f1c1bc9f8f0a7783e71efb57e4cc</id>
<content type='text'>
Added dedicated 64bit reg read/write support

Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: John Clements &lt;john.clements@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: enable xgmi support for sienna cichlid</title>
<updated>2020-07-21T19:37:39+00:00</updated>
<author>
<name>John Clements</name>
<email>john.clements@amd.com</email>
</author>
<published>2020-07-17T06:13:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c652923afa7c8fef2aee42142e9663c0e69f367d'/>
<id>urn:sha1:c652923afa7c8fef2aee42142e9663c0e69f367d</id>
<content type='text'>
set xgmi support flag suring nv ip init sequence

Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: John Clements &lt;john.clements@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: enable ih CG for navy_flounder</title>
<updated>2020-07-15T17:27:34+00:00</updated>
<author>
<name>Jiansong Chen</name>
<email>Jiansong.Chen@amd.com</email>
</author>
<published>2020-07-08T11:02:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=85e7151baa2ffc76edd9a0267caffd369ab6cd93'/>
<id>urn:sha1:85e7151baa2ffc76edd9a0267caffd369ab6cd93</id>
<content type='text'>
Enable ih CG by setting the corresponding flag.

Signed-off-by: Jiansong Chen &lt;Jiansong.Chen@amd.com&gt;
Reviewed-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: enable hdp CG and LS for navy_flounder</title>
<updated>2020-07-15T17:27:34+00:00</updated>
<author>
<name>Jiansong Chen</name>
<email>Jiansong.Chen@amd.com</email>
</author>
<published>2020-07-08T10:59:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=4759f8871f3dc75a47b0b9cf38064958ce76eb35'/>
<id>urn:sha1:4759f8871f3dc75a47b0b9cf38064958ce76eb35</id>
<content type='text'>
Enable hdp CG and LS by setting the corresponding flags.

Signed-off-by: Jiansong Chen &lt;Jiansong.Chen@amd.com&gt;
Reviewed-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: enable mc CG and LS for navy_flounder</title>
<updated>2020-07-15T17:27:34+00:00</updated>
<author>
<name>Jiansong Chen</name>
<email>Jiansong.Chen@amd.com</email>
</author>
<published>2020-07-08T10:53:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=92c737561c526ea7fbb87b52244b9fb1e914ff8f'/>
<id>urn:sha1:92c737561c526ea7fbb87b52244b9fb1e914ff8f</id>
<content type='text'>
Enable mc CG and LS by setting the corresponding flags.

Signed-off-by: Jiansong Chen &lt;Jiansong.Chen@amd.com&gt;
Reviewed-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: enable athub/mmhub PG for navy_flounder</title>
<updated>2020-07-15T17:27:34+00:00</updated>
<author>
<name>Jiansong Chen</name>
<email>Jiansong.Chen@amd.com</email>
</author>
<published>2020-07-08T10:42:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=47fc894a8711e9cc22bc3c508d15415c0b191480'/>
<id>urn:sha1:47fc894a8711e9cc22bc3c508d15415c0b191480</id>
<content type='text'>
Enable athub/mmhub PG by setting the corresponding flags.
Actually the enablement is exercised by PMFW.

Signed-off-by: Jiansong Chen &lt;Jiansong.Chen@amd.com&gt;
Reviewed-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: add DC support for navy flounder</title>
<updated>2020-07-15T17:27:26+00:00</updated>
<author>
<name>Bhawanpreet Lakha</name>
<email>Bhawanpreet.Lakha@amd.com</email>
</author>
<published>2020-07-08T21:11:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=a6c5308f2a7ad2a79fb6fd60b52367c51434c04a'/>
<id>urn:sha1:a6c5308f2a7ad2a79fb6fd60b52367c51434c04a</id>
<content type='text'>
Plumb DC support for navy flounder through.

Signed-off-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
