<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c, branch v6.3.2</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.3.2</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.3.2'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2023-01-03T21:50:03+00:00</updated>
<entry>
<title>drm/amdgpu: rename vram_scratch into mem_scratch</title>
<updated>2023-01-03T21:50:03+00:00</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2022-01-21T15:59:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=7ccfd79fdd6c1a3b44badc994d9581fc9e634562'/>
<id>urn:sha1:7ccfd79fdd6c1a3b44badc994d9581fc9e634562</id>
<content type='text'>
Rename vram_scratch into mem_scratch and allow allocating it into GTT as
well.

The only problem with that is that we won't have a default page for the
system aperture any more.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Luben Tuikov &lt;luben.tuikov@amd.com&gt;
Acked-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fix mmhub register base coding error</title>
<updated>2022-12-06T15:18:18+00:00</updated>
<author>
<name>Yang Wang</name>
<email>KevinYang.Wang@amd.com</email>
</author>
<published>2022-12-05T13:16:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=347fafe0eb46df941965c355c77ce480e4d49f1f'/>
<id>urn:sha1:347fafe0eb46df941965c355c77ce480e4d49f1f</id>
<content type='text'>
fix MMHUB register base coding error.

Fixes: ec6837591f992 ("drm/amdgpu/gmc10: program the smallK fragment size")

Signed-off-by: Yang Wang &lt;KevinYang.Wang@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu: save the setting of VM_CONTEXT_CNTL</title>
<updated>2022-05-04T13:57:22+00:00</updated>
<author>
<name>Jack Xiao</name>
<email>Jack.Xiao@amd.com</email>
</author>
<published>2021-05-12T07:53:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=d7dab4fc44ad020b48a893dae728190e2f01f14d'/>
<id>urn:sha1:d7dab4fc44ad020b48a893dae728190e2f01f14d</id>
<content type='text'>
MES firmware needs the setting of VM_CONTEXT_CNTL to perform
vmid switch. Save the initial setting when hub initializing.

Signed-off-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: expand cg_flags from u32 to u64</title>
<updated>2022-04-08T21:24:24+00:00</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2022-03-25T10:00:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=25faeddcf3c3f31f9f43de5c55f7cbdd13d3ebc7'/>
<id>urn:sha1:25faeddcf3c3f31f9f43de5c55f7cbdd13d3ebc7</id>
<content type='text'>
With this, we can support more CG flags.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add support for gmc10 for gc 10.3.6</title>
<updated>2022-02-17T20:59:05+00:00</updated>
<author>
<name>Yifan Zhang</name>
<email>yifan1.zhang@amd.com</email>
</author>
<published>2022-02-10T19:35:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=a142606d5433c9bfc68c0f40ba32c2e05ad75d09'/>
<id>urn:sha1:a142606d5433c9bfc68c0f40ba32c2e05ad75d09</id>
<content type='text'>
this patch adds support for gmc10.

Signed-off-by: Yifan Zhang &lt;yifan1.zhang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Huang Rui &lt;ray.huang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: don't override default ECO_BITs setting</title>
<updated>2021-12-14T22:50:36+00:00</updated>
<author>
<name>Hawking Zhang</name>
<email>Hawking.Zhang@amd.com</email>
</author>
<published>2021-12-04T11:22:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=841933d5b8aa853abe68e63827f68f50fab37226'/>
<id>urn:sha1:841933d5b8aa853abe68e63827f68f50fab37226</id>
<content type='text'>
Leave this bit as hardware default setting

Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu: convert IP version array to include instances</title>
<updated>2021-10-04T19:23:01+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2021-10-04T19:19:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=1d789535a03679e5ce0b56a0d32a5e44596dfcdb'/>
<id>urn:sha1:1d789535a03679e5ce0b56a0d32a5e44596dfcdb</id>
<content type='text'>
Allow us to query instances versions more cleanly.

Instancing support is not consistent unfortunately. SDMA is a
good example.  Sienna cichlid has 4 total SDMA instances, each
enumerated separately (HWIDs 42, 43, 68, 69).  Arcturus has 8
total SDMA instances, but they are enumerated as multiple
instances of the same HWIDs (4x HWID 42, 4x HWID 43).  UMC
is another example.  On most chips there are multiple
instances with the same HWID.  This allows us to support both
forms.

v2: rebase
v3: clarify instancing support

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/mmhub2.1: convert to IP version checking</title>
<updated>2021-10-04T19:22:59+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2021-07-27T20:23:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=bc7c3d1d8a3e9e36df5d3aa061ae6851c2379b2c'/>
<id>urn:sha1:bc7c3d1d8a3e9e36df5d3aa061ae6851c2379b2c</id>
<content type='text'>
Use IP versions rather than asic_type to differentiate
IP version specific features.

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add mmhub client support for yellow carp</title>
<updated>2021-06-04T20:03:12+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2020-12-16T15:40:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=1b3869386e57bd3ea4ef47226a0f08f2b9fcfb30'/>
<id>urn:sha1:1b3869386e57bd3ea4ef47226a0f08f2b9fcfb30</id>
<content type='text'>
To help debugging GPUVM page faults.

Acked-by: Huang Rui &lt;ray.huang@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Delete two unneeded bool conversions</title>
<updated>2021-05-11T13:44:35+00:00</updated>
<author>
<name>Zhen Lei</name>
<email>thunder.leizhen@huawei.com</email>
</author>
<published>2021-05-10T12:23:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=0bb6d3db4f75c960769de128f3bccb320b5d044d'/>
<id>urn:sha1:0bb6d3db4f75c960769de128f3bccb320b5d044d</id>
<content type='text'>
The result of an expression consisting of a single relational operator is
already of the bool type and does not need to be evaluated explicitly.

No functional change.

Signed-off-by: Zhen Lei &lt;thunder.leizhen@huawei.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
