kernel/linux.git/drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c, branch v6.2.2Linux kernel stable tree (mirror)https://git.radix-linux.su/kernel/linux.git/atom?h=v6.2.22022-12-06T15:18:18+00:00drm/amdgpu: fix mmhub register base coding error2022-12-06T15:18:18+00:00Yang WangKevinYang.Wang@amd.com2022-12-05T13:16:26+00:00urn:sha1:347fafe0eb46df941965c355c77ce480e4d49f1f
fix MMHUB register base coding error.
Fixes: ec6837591f992 ("drm/amdgpu/gmc10: program the smallK fragment size")
Signed-off-by: Yang Wang <KevinYang.Wang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
drm/amdgpu: save the setting of VM_CONTEXT_CNTL2022-05-04T13:57:22+00:00Jack XiaoJack.Xiao@amd.com2021-05-12T07:53:48+00:00urn:sha1:d7dab4fc44ad020b48a893dae728190e2f01f14d
MES firmware needs the setting of VM_CONTEXT_CNTL to perform
vmid switch. Save the initial setting when hub initializing.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: expand cg_flags from u32 to u642022-04-08T21:24:24+00:00Evan Quanevan.quan@amd.com2022-03-25T10:00:02+00:00urn:sha1:25faeddcf3c3f31f9f43de5c55f7cbdd13d3ebc7
With this, we can support more CG flags.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add support for gmc10 for gc 10.3.62022-02-17T20:59:05+00:00Yifan Zhangyifan1.zhang@amd.com2022-02-10T19:35:48+00:00urn:sha1:a142606d5433c9bfc68c0f40ba32c2e05ad75d09
this patch adds support for gmc10.
Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: don't override default ECO_BITs setting2021-12-14T22:50:36+00:00Hawking ZhangHawking.Zhang@amd.com2021-12-04T11:22:12+00:00urn:sha1:841933d5b8aa853abe68e63827f68f50fab37226
Leave this bit as hardware default setting
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
drm/amdgpu: convert IP version array to include instances2021-10-04T19:23:01+00:00Alex Deucheralexander.deucher@amd.com2021-10-04T19:19:10+00:00urn:sha1:1d789535a03679e5ce0b56a0d32a5e44596dfcdb
Allow us to query instances versions more cleanly.
Instancing support is not consistent unfortunately. SDMA is a
good example. Sienna cichlid has 4 total SDMA instances, each
enumerated separately (HWIDs 42, 43, 68, 69). Arcturus has 8
total SDMA instances, but they are enumerated as multiple
instances of the same HWIDs (4x HWID 42, 4x HWID 43). UMC
is another example. On most chips there are multiple
instances with the same HWID. This allows us to support both
forms.
v2: rebase
v3: clarify instancing support
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/mmhub2.1: convert to IP version checking2021-10-04T19:22:59+00:00Alex Deucheralexander.deucher@amd.com2021-07-27T20:23:45+00:00urn:sha1:bc7c3d1d8a3e9e36df5d3aa061ae6851c2379b2c
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add mmhub client support for yellow carp2021-06-04T20:03:12+00:00Alex Deucheralexander.deucher@amd.com2020-12-16T15:40:30+00:00urn:sha1:1b3869386e57bd3ea4ef47226a0f08f2b9fcfb30
To help debugging GPUVM page faults.
Acked-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Delete two unneeded bool conversions2021-05-11T13:44:35+00:00Zhen Leithunder.leizhen@huawei.com2021-05-10T12:23:38+00:00urn:sha1:0bb6d3db4f75c960769de128f3bccb320b5d044d
The result of an expression consisting of a single relational operator is
already of the bool type and does not need to be evaluated explicitly.
No functional change.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Calling address translation functions to simplify codes2021-04-15T20:03:01+00:00Oak ZengOak.Zeng@amd.com2021-04-01T19:36:41+00:00urn:sha1:0ca565ab97083acaf640dd58a6f66cbe3d802356
Use amdgpu_gmc_vram_pa and amdgpu_gmc_vram_cpu_pa
to simplify codes. No logic change.
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>