<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c, branch v6.10.7</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.10.7</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.10.7'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2024-08-14T13:34:14+00:00</updated>
<entry>
<title>drm/amdgpu: Add lock around VF RLCG interface</title>
<updated>2024-08-14T13:34:14+00:00</updated>
<author>
<name>Victor Skvortsov</name>
<email>victor.skvortsov@amd.com</email>
</author>
<published>2024-05-27T20:10:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=e1ab38e99d1607f80a1670a399511a56464c0253'/>
<id>urn:sha1:e1ab38e99d1607f80a1670a399511a56464c0253</id>
<content type='text'>
[ Upstream commit e864180ee49b4d30e640fd1e1d852b86411420c9 ]

flush_gpu_tlb may be called from another thread while
device_gpu_recover is running.

Both of these threads access registers through the VF
RLCG interface during VF Full Access. Add a lock around this interface
to prevent race conditions between these threads.

Signed-off-by: Victor Skvortsov &lt;victor.skvortsov@amd.com&gt;
Reviewed-by: Zhigang Luo &lt;zhigang.luo@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>amd/amdgpu: improve VF recover time</title>
<updated>2024-04-10T02:14:30+00:00</updated>
<author>
<name>Zhigang Luo</name>
<email>Zhigang.Luo@amd.com</email>
</author>
<published>2024-03-20T14:40:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=d1999b4017d485a3168b4ba1316937c82454165a'/>
<id>urn:sha1:d1999b4017d485a3168b4ba1316937c82454165a</id>
<content type='text'>
1. change AMDGPU_VF2PF_UPDATE_MAX_RETRY_LIMIT from 30 to 5.
2. set fatel error detected flag.

Signed-off-by: Zhigang Luo &lt;Zhigang.Luo@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/amdgpu: support MES command SET_HW_RESOURCE1 in sriov</title>
<updated>2024-04-10T02:08:53+00:00</updated>
<author>
<name>chongli2</name>
<email>chongli2@amd.com</email>
</author>
<published>2024-03-26T05:24:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=f6ac0842364a5721c02e9dd1c956eb51c7431ff3'/>
<id>urn:sha1:f6ac0842364a5721c02e9dd1c956eb51c7431ff3</id>
<content type='text'>
support MES command SET_HW_RESOURCE1 in sriov

Signed-off-by: chongli2 &lt;chongli2@amd.com&gt;
Reviewed-by: Jingwen Chen &lt;Jingwen.Chen2@amd.com&gt;
Acked-by: Jingwen Chen &lt;Jingwen.Chen2@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: use vm_update_mode=0 as default in sriov for gfx10.3 onwards</title>
<updated>2024-04-10T02:02:37+00:00</updated>
<author>
<name>Danijel Slivka</name>
<email>danijel.slivka@amd.com</email>
</author>
<published>2024-03-27T22:56:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=3e2dacca540643ee35e3deb1d60873e7138a6af3'/>
<id>urn:sha1:3e2dacca540643ee35e3deb1d60873e7138a6af3</id>
<content type='text'>
Apply this rule to all newer asics in sriov case.
For asic with VF MMIO access protection avoid using CPU for VM table updates.
CPU pagetable updates have issues with HDP flush as VF MMIO access protection
blocks write to BIF_BX_DEV0_EPF0_VF0_HDP_MEM_COHERENCY_FLUSH_CNTL register
during sriov runtime.
Moved the check to amdgpu_device_init() to ensure it is done after
amdgpu_device_ip_early_init() where the IP versions are discovered.

Signed-off-by: Danijel Slivka &lt;danijel.slivka@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: trigger flr_work if reading pf2vf data failed</title>
<updated>2024-03-20T17:38:13+00:00</updated>
<author>
<name>Zhigang Luo</name>
<email>Zhigang.Luo@amd.com</email>
</author>
<published>2024-02-29T21:04:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=ab66c832847fcdffc97d4591ba5547e3990d9d33'/>
<id>urn:sha1:ab66c832847fcdffc97d4591ba5547e3990d9d33</id>
<content type='text'>
if reading pf2vf data failed 30 times continuously, it means something is
wrong. Need to trigger flr_work to recover the issue.

also use dev_err to print the error message to get which device has
issue and add warning message if waiting IDH_FLR_NOTIFICATION_CMPL
timeout.

Signed-off-by: Zhigang Luo &lt;Zhigang.Luo@amd.com&gt;
Acked-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Improve error checking in amdgpu_virt_rlcg_reg_rw (v2)</title>
<updated>2024-02-22T15:27:23+00:00</updated>
<author>
<name>Victor Lu</name>
<email>victorchengchi.lu@amd.com</email>
</author>
<published>2024-02-12T22:33:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=8093383ae7f5f196e3d4f3cc47abb557c81b9e6f'/>
<id>urn:sha1:8093383ae7f5f196e3d4f3cc47abb557c81b9e6f</id>
<content type='text'>
The current error detection only looks for a timeout.
This should be changed to also check scratch_reg1 for any errors
returned from RLCG.

v2: remove new error value

Signed-off-by: Victor Lu &lt;victorchengchi.lu@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>amdgpu/drm: Use vram manager for virtualization page retirement</title>
<updated>2024-01-25T19:58:03+00:00</updated>
<author>
<name>Victor Skvortsov</name>
<email>victor.skvortsov@amd.com</email>
</author>
<published>2024-01-22T17:45:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=362936d613e81ee7c3d11a185103c4f3e4f59f2a'/>
<id>urn:sha1:362936d613e81ee7c3d11a185103c4f3e4f59f2a</id>
<content type='text'>
In runtime, use vram manager for virtualization page retirement.

Signed-off-by: Victor Skvortsov &lt;victor.skvortsov@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: move kiq_reg_write_reg_wait() out of amdgpu_virt.c</title>
<updated>2024-01-15T23:35:36+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2023-12-14T17:18:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=26405ff4306a7be83a551d65b801998ae926f276'/>
<id>urn:sha1:26405ff4306a7be83a551d65b801998ae926f276</id>
<content type='text'>
It's used for more than just SR-IOV now, so move it to
amdgpu_gmc.c and rename it to better match the functionality and
update the comments in the code paths to better document
when each path is used and why.  No functional change.

Reviewed-by: Shaoyun.liu &lt;Shaoyun.liu@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: Shaoyun.Liu@amd.com
Cc: Christian.Koenig@amd.com
</content>
</entry>
<entry>
<title>drm/amdgpu: Use the right method to get IP version</title>
<updated>2023-12-13T20:09:53+00:00</updated>
<author>
<name>Lijo Lazar</name>
<email>lijo.lazar@amd.com</email>
</author>
<published>2023-12-01T11:43:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=ed342a2e78c4e4a8d82c2d19c95e8a3eb092c0d0'/>
<id>urn:sha1:ed342a2e78c4e4a8d82c2d19c95e8a3eb092c0d0</id>
<content type='text'>
Replace direct usage of adev-&gt;ip_versions with amdgpu_ip_version.

Signed-off-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Use correct KIQ MEC engine for gfx9.4.3 (v5)</title>
<updated>2023-11-09T22:03:07+00:00</updated>
<author>
<name>Victor Lu</name>
<email>victorchengchi.lu@amd.com</email>
</author>
<published>2023-10-03T20:15:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=85150626ea0423fd0adb5ac9b5ab4bbaff9aa30b'/>
<id>urn:sha1:85150626ea0423fd0adb5ac9b5ab4bbaff9aa30b</id>
<content type='text'>
amdgpu_kiq_wreg/rreg is hardcoded to use MEC engine 0.

Add an xcc_id parameter to amdgpu_kiq_wreg/rreg, define W/RREG32_XCC
and amdgpu_device_xcc_wreg/rreg to use the new xcc_id parameter.

Using amdgpu_sriov_runtime to determine whether to access via kiq or
RLC is sufficient for now.

v5: add condition in amdgpu_device_xcc_w/rreg, remove trace func call

v4: avoid using amdgpu_sriov_w/rreg

v3: use W/RREG32_XCC to handle non-kiq case

v2: define amdgpu_device_xcc_wreg/rreg instead of changing parameters
    of amdgpu_device_wreg/rreg

Signed-off-by: Victor Lu &lt;victorchengchi.lu@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
