<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c, branch v4.16.17</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v4.16.17</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v4.16.17'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2017-12-06T17:47:51+00:00</updated>
<entry>
<title>drm/amdgpu:free CSA in unified place</title>
<updated>2017-12-06T17:47:51+00:00</updated>
<author>
<name>Monk Liu</name>
<email>Monk.Liu@amd.com</email>
</author>
<published>2017-11-14T08:52:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=84e5b5161e7159bcf24dfeed9f985bd86e354ea8'/>
<id>urn:sha1:84e5b5161e7159bcf24dfeed9f985bd86e354ea8</id>
<content type='text'>
instead of doing it in each GFX ip's sw_fini

Signed-off-by: Monk Liu &lt;Monk.Liu@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/virt: remove redundant variable pf2vf_ver</title>
<updated>2017-12-06T17:47:23+00:00</updated>
<author>
<name>Colin Ian King</name>
<email>colin.king@canonical.com</email>
</author>
<published>2017-11-11T11:51:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=288e46d398aa323ae9cfb735d9e1e93a9f048d64'/>
<id>urn:sha1:288e46d398aa323ae9cfb735d9e1e93a9f048d64</id>
<content type='text'>
Variable pf2vf_ver is assigned but never read, it is redundant and
hence can be removed.

Cleans up clang warning:
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c:310:3: warning: Value stored
to 'pf2vf_ver' is never read

Reivewed-by: Horace Chen &lt;horace.chen@amd.com&gt;
Signed-off-by: Colin Ian King &lt;colin.king@canonical.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu:read VRAMLOST from gim</title>
<updated>2017-12-04T21:41:45+00:00</updated>
<author>
<name>Monk Liu</name>
<email>Monk.Liu@amd.com</email>
</author>
<published>2017-10-30T12:11:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=75bc6099bc619bd58e09d5203081ec9dc5535ec1'/>
<id>urn:sha1:75bc6099bc619bd58e09d5203081ec9dc5535ec1</id>
<content type='text'>
Signed-off-by: Monk Liu &lt;Monk.Liu@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu:cleanup in_sriov_reset and lock_reset</title>
<updated>2017-12-04T21:41:31+00:00</updated>
<author>
<name>Monk Liu</name>
<email>Monk.Liu@amd.com</email>
</author>
<published>2017-10-17T07:11:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=13a752e3a246493bfaba0cf0e0f376672ebb734c'/>
<id>urn:sha1:13a752e3a246493bfaba0cf0e0f376672ebb734c</id>
<content type='text'>
since now gpu reset is unified with gpu_recover
for both bare-metal and SR-IOV:

1)rename in_sriov_reset to in_gpu_reset
2)move lock_reset from adev-&gt;virt to adev

Signed-off-by: Monk Liu &lt;Monk.Liu@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/virt: add wait_reset virt ops</title>
<updated>2017-12-04T21:33:13+00:00</updated>
<author>
<name>pding</name>
<email>Pixel.Ding@amd.com</email>
</author>
<published>2017-10-24T01:51:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=b636176efdf0e365a69613f03f6ecbf6fd0408cb'/>
<id>urn:sha1:b636176efdf0e365a69613f03f6ecbf6fd0408cb</id>
<content type='text'>
Driver can use this interface to check if there's a function level
reset done in hypervisor. It's helpful when IRQ handler for reset
is not ready, or special handling is required.

Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Monk Liu &lt;monk.liu@amd.com&gt;
Signed-off-by: pding &lt;Pixel.Ding@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/virt: add function to check MMIO (v2)</title>
<updated>2017-12-04T21:33:13+00:00</updated>
<author>
<name>pding</name>
<email>Pixel.Ding@amd.com</email>
</author>
<published>2017-10-24T02:01:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=a16f8f11c599cdec16e77020d56d230fedabe922'/>
<id>urn:sha1:a16f8f11c599cdec16e77020d56d230fedabe922</id>
<content type='text'>
MMIO space can be blocked on virtualised device. Add this
function to check if MMIO is blocked or not.

Todo: need a reliable method such like communation
with hypervisor.

v2:
 - add comments inline

Signed-off-by: pding &lt;Pixel.Ding@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: use irq-safe lock for kiq-&gt;ring_lock</title>
<updated>2017-11-08T22:55:14+00:00</updated>
<author>
<name>pding</name>
<email>Pixel.Ding@amd.com</email>
</author>
<published>2017-11-07T06:32:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=cdd9a8b8599b952e2b39763090689ec2ad8e40c3'/>
<id>urn:sha1:cdd9a8b8599b952e2b39763090689ec2ad8e40c3</id>
<content type='text'>
This lock is used during register accessing in SRIOV guest.
The register accessing could happen both in irq enabled and
irq disabled cases. Always use irq-safe lock.

Signed-off-by: Pixel Ding &lt;Pixel.Ding@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/virt: don't dereference undefined 'module' struct</title>
<updated>2017-11-03T13:42:28+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2017-11-02T11:25:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=e477e940dad1836c6f6d23353e424665b9316b6e'/>
<id>urn:sha1:e477e940dad1836c6f6d23353e424665b9316b6e</id>
<content type='text'>
Accessing the THIS_MODULE directly is only possible when modules
are enabled, otherwise we get a build failure:

drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c: In function 'amdgpu_virt_init_data_exchange':
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c:331:20: error: dereferencing pointer to incomplete type 'struct module'

Further, THIS_MODULE is NULL when the driver is built-in, so the
code would likely cause a NULL pointer dereference.

This adds an #ifdef check to avoid the compile-time error, plus
a NULL pointer check before dereferencing THIS_MODULE. It might
be better to find a way to avoid using the module version
altogether.

Fixes: 2dc8f81e4f82 ("drm/amdgpu: SR-IOV data exchange between PF&amp;VF")
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Reviewed-By: Xiangliang Yu &lt;Xiangliang.Yu@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: busywait KIQ register accessing (v4)</title>
<updated>2017-10-19T19:27:19+00:00</updated>
<author>
<name>pding</name>
<email>Pixel.Ding@amd.com</email>
</author>
<published>2017-10-13T07:38:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=43ca8efa46d9b1c4defa1b27c4dd1ef3866aaad9'/>
<id>urn:sha1:43ca8efa46d9b1c4defa1b27c4dd1ef3866aaad9</id>
<content type='text'>
Register accessing is performed when IRQ is disabled. Never sleep in
this function.

Known issue: dead sleep in many use cases of index/data registers.

v2:
 - wrap polling fence functions.
 - don't trigger IRQ for polling in case of wrongly fence signal.

v3:
 - handle wrap round gracefully.
 - add comments for polling function

v4:
 - don't return negative timeout confused with error code

Signed-off-by: pding &lt;Pixel.Ding@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: SR-IOV data exchange between PF&amp;VF</title>
<updated>2017-10-19T19:26:59+00:00</updated>
<author>
<name>Horace Chen</name>
<email>horace.chen@amd.com</email>
</author>
<published>2017-10-09T08:17:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=2dc8f81e4f822cfe8f6475da968ab2dd5881b8d8'/>
<id>urn:sha1:2dc8f81e4f822cfe8f6475da968ab2dd5881b8d8</id>
<content type='text'>
SR-IOV need to exchange some data between PF&amp;VF through shared VRAM

PF will copy some necessary firmware and information to the shared
VRAM. It also requires some information from VF. PF will send a
key through mailbox2 to help guest calculate checksum so that it can
verify whether the data is correct.

So check the data on the specified offset of the shared VRAM, if the
checksum is right, read values from it and write some VF information
next to the data from PF.

Signed-off-by: Horace Chen &lt;horace.chen@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
