kernel/linux.git/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h, branch v6.19.12Linux kernel stable tree (mirror)https://git.radix-linux.su/kernel/linux.git/atom?h=v6.19.122025-11-06T14:58:31+00:00drm/amdgpu: make MCA IPID parse global2025-11-06T14:58:31+00:00Tao Zhoutao.zhou1@amd.com2025-09-30T02:56:00+00:00urn:sha1:cd74132be8461429b5e98991aa15edeeb81a9f56
So we can call it in other blocks.
v2: add a new IPID parse interface for umc and we can
implement it for each ASIC.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: handle old RAS eeprom data in non-nps1 mode2025-05-29T14:57:05+00:00ganglxieganglxie@amd.com2025-05-22T06:28:52+00:00urn:sha1:31e837d242cbb58afed8e0d2a722745bc50ad154
Get MCA address from PA in nps1, then convert MCA address to PA in specific nps
mode.
Signed-off-by: ganglxie <ganglxie@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Modify the count method of defer error2025-05-13T13:35:12+00:00Ce Suncesun102@amd.com2025-05-06T12:17:33+00:00urn:sha1:533aa8bdbedb23ff0f1e5022b94b990bb677ed0e
The number of newly added de counts and the number of
newly added error addresses remain consistent
Signed-off-by: Ce Sun <cesun102@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add get_retire_flip_bits for UMC2025-05-13T13:32:01+00:00Tao Zhoutao.zhou1@amd.com2025-04-10T11:29:57+00:00urn:sha1:699bff37a56c814c414f5b7ca9e49ef8aae660b9
Add the general interface to get flip bits for RAS bad page retirement.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Save nps to eeprom2025-02-25T16:45:12+00:00ganglxieganglxie@amd.com2025-02-24T03:17:33+00:00urn:sha1:f2510355fba808972253a8d8729f05e064c89321
nps info saved together with bad page makes bad page parsing more efficient
Signed-off-by: ganglxie <ganglxie@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add interface to get die id from memory address2024-12-10T15:26:47+00:00Tao Zhoutao.zhou1@amd.com2024-10-30T08:42:42+00:00urn:sha1:fcb600b07894913a9e73d8c1a1ce86a36324e4a7
And implement it for UMC v12_0. The die id is calculated from IPID
register in bad page retirement flow, but we don't store it on eeprom
and it can be also gotten from physical address.
v2: get PA_C4 and PA_R13 from MCA address since they may be cleared in
retired page.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add a flag to indicate UMC channel index version2024-12-10T15:26:46+00:00Tao Zhoutao.zhou1@amd.com2024-10-30T06:17:49+00:00urn:sha1:2206daa1f9182a08aea92213dc2bcb387173dab1
v1 (legacy way): store channel index within a UMC instance in eeprom
v2: store global channel index in eeprom
V2: only save the flag on eeprom, clear it after saving.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: save UMC global channel index to eeprom2024-12-10T15:26:46+00:00Tao Zhoutao.zhou1@amd.com2024-10-29T11:46:44+00:00urn:sha1:71a0e9630027f77d7646c5b750593c9ecfaa27d3
Save the global channel index returned by RAS TA to eeprom.
We can get memory physical address by MCA address and channel index.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add function to find all memory pages in one physical row2024-12-10T15:26:46+00:00Tao Zhoutao.zhou1@amd.com2024-10-24T06:46:19+00:00urn:sha1:b02ef407729d9eb26fbc74ca229e28dbe971e1c1
And the function can be reused across amdgpu driver.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add return value for convert_ras_err_addr2024-12-10T15:26:46+00:00Tao Zhoutao.zhou1@amd.com2024-10-18T08:43:44+00:00urn:sha1:f44a30583bcf2b9c3846264515d618d349e67485
So upper layer can return failure directly if address conversion fails.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>