kernel/linux.git/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h, branch v5.11.5Linux kernel stable tree (mirror)https://git.radix-linux.su/kernel/linux.git/atom?h=v5.11.52020-07-23T14:45:00+00:00drm/amdgpu: move umc specific macros to header2020-07-23T14:45:00+00:00John Clementsjohn.clements@amd.com2020-07-23T09:38:20+00:00urn:sha1:c5a4ef3e20da16829bf417fb2093824c1bc0f82f
certain umc macros are common across umc versions
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: John Clements <john.clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: resolve bug in UMC 6 error counter query2020-01-07T16:58:37+00:00John Clementsjohn.clements@amd.com2020-01-03T03:55:42+00:00urn:sha1:bd68fb94b3d4601b45a7e4558b9de0eebdb85ec1
iterate over all error counter registers in SMN space
removed support error counter access via MMIO
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: John Clements <john.clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: move umc ras fini to umc block2019-10-03T14:11:02+00:00Tao Zhoutao.zhou1@amd.com2019-09-18T09:46:42+00:00urn:sha1:181c93e5ecdb8c8f3bcc74e38adcd668db85c441
it's more suitable to put umc ras fini in umc block
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: remove ih_info parameter of umc_ras_late_init2019-10-03T14:11:02+00:00Tao Zhoutao.zhou1@amd.com2019-09-12T10:54:33+00:00urn:sha1:56c54b25c3b60a64d4ffd7b6b2a309b3febcfdd4
umc_ras_late_init can get the info by itself
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: move umc_ras_if from gmc to umc block2019-10-03T14:11:02+00:00Tao Zhoutao.zhou1@amd.com2019-09-12T08:34:08+00:00urn:sha1:03740baab3b574ed40f39bb9eda715bb32045337
umc_ras_if is relevant to umc
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: move umc ras irq functions to umc block2019-10-03T14:11:01+00:00Tao Zhoutao.zhou1@amd.com2019-09-12T03:11:25+00:00urn:sha1:34cc4fd9ff710f31b172dbb8bdcc3a3ab492fff3
move umc ras irq functions from gmc v9 to generic umc block, these
functions are relevant to umc and they can be shared among all
generations of umc
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: fix an UMC hw arbitrator bug(v3)2019-10-03T14:11:01+00:00Monk LiuMonk.Liu@amd.com2019-09-24T08:08:00+00:00urn:sha1:e7da754b00ee40af55e522f9dc478d8ed3a3ad3d
issue:
the UMC6 h/w bug is that when MCLK is doing the switch
in the middle of a page access being preempted by high
priority client (e.g. DISPLAY) then UMC and the mclk switch
would stuck there due to deadlock
how:
fixed by disabling auto PreChg for UMC to avoid high
priority client preempting other client's access on
the same page, thus the deadlock could be avoided
v2:
put the patch in callback of UMC6
v3:
rename the callback to "init_registers"
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <hawking.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: rename umc ras_init to err_cnt_init2019-09-16T15:06:20+00:00Tao Zhoutao.zhou1@amd.com2019-09-06T06:32:14+00:00urn:sha1:d99659a062316bc95269a52f2428a7ad96ee4315
this interface is related to specific version of umc, distinguish it
from ras_late_init
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: move umc late init from gmc to umc block2019-09-16T15:06:03+00:00Tao Zhoutao.zhou1@amd.com2019-09-05T11:16:19+00:00urn:sha1:86edcc7dba53995ea9448e535d7eb21dff5245d0
umc late init is umc specific, it's more suitable to be put in umc block
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: implement UMC 64 bits REG operations2019-08-09T16:17:10+00:00Tao Zhoutao.zhou1@amd.com2019-08-09T07:57:50+00:00urn:sha1:dd21a572c9068e9a59b46dea67e8a65a44aee90b
implement 64 bits operations via 32 bits interface
v2: make use of lower_32_bits() and upper_32_bits() macros
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>