kernel/linux.git/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c, branch v4.12.9Linux kernel stable tree (mirror)https://git.radix-linux.su/kernel/linux.git/atom?h=v4.12.92017-04-28T21:32:14+00:00drm/amdgpu: Fix firmware UCODE_ID_STORAGE issue (v2)2017-04-28T21:32:14+00:00Trigger Huangtrigger.huang@amd.com2017-04-11T05:56:36+00:00urn:sha1:bc108ec78e2af5c7a5f6ef27e264b8093bd60e3b
In Tonga's virtualization environment, for firmware UCODE_ID_STORAGE,
there is no actual firmware data, but we still need alloc a BO and
tell the BO's mc address to HW, or world switch will hang on VFs.
v2: fix coding style (Alex)
Signed-off-by: Trigger Huang <trigger.huang@amd.com>
Reviewed-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: rework common ucode handling for vega102017-03-30T03:54:40+00:00Huang Ruiray.huang@amd.com2017-03-03T21:20:35+00:00urn:sha1:2445b22751a0c039c2d1f35412e45350e847855d
Handle ucode differences in vega10.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: use new flag to handle different firmware loading method2017-03-30T03:54:33+00:00Huang Ruiray.huang@amd.com2016-11-01T07:35:38+00:00urn:sha1:e635ee07456ac686b3c26ab3c5735936faebfb2e
This patch introduces a new flag named "amdgpu_firmware_load_type" to
handle different firmware loading method. Since Vega10, there are
three ways to load firmware. It would be better to use a flag and a
fw_load_type kernel parameter to configure it.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add a ucode size member into firmware info2017-03-30T03:53:39+00:00Huang Ruiray.huang@amd.com2016-10-10T07:19:06+00:00urn:sha1:daf42c314dbd70f892f8020d817b46793c0e1b3f
This will be used for newer asics.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu:properly fix some JumpTable issues2016-10-25T18:38:23+00:00Monk LiuMonk.Liu@amd.com2016-09-27T08:39:58+00:00urn:sha1:4c2b2453ef9be2e105a987cd13cf3ce14e53f5e0
we found some MEC ucode leads to IB test fail or even
ring test fail if Jump Table of it is not start in
FW bo with page aligned address, fixed by always make
JT address page aligned.
we don't need to patch JT2 for MEC2, because for VI,
MEC2 is a copy of MEC1, thus when converting fw_type
for MEC_JT2 we just return MEC1,hw can use the same
JT for both MEC1 & MEC2.
above two change fixed some ring/ib test failure issue
for some version of MEC ucode.
Signed-off-by: Frank Min <Frank.Min@amd.com>
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu:add MEC_STORAGE ucode id for sriov2016-10-25T18:38:23+00:00Monk LiuMonk.Liu@amd.com2016-09-26T08:35:03+00:00urn:sha1:bed5712e1a52bb5d177722bc0d76c2a3a71b8338
for sriov, SMC need MEC_STORAGE reserved in fw bo.
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Frank Min <frank.min@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu:fw bo should be in VRAM for SRIOV2016-10-25T18:38:22+00:00Frank MinFrank.Min@amd.com2016-04-27T12:02:57+00:00urn:sha1:f501a7e550015bc3170c24d18ba1a008e38bddbf
for GTT memory SMC can only access it within PF space, which is not
used for SRIOV case, thus for SRIOV case, we let SMC use FB space for
ucode bo.
Signed-off-by: Frank Min <frank.min@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: clean up to set fw_offset as 0 twice2016-10-04T15:16:00+00:00Huang Ruiray.huang@amd.com2016-09-28T08:04:33+00:00urn:sha1:806c60c2c1d387068dd2b47efdb52aac9a1f75ef
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: move some release handles into fail labels (v2)2016-09-14T19:10:25+00:00Huang Ruiray.huang@amd.com2016-09-12T02:16:21+00:00urn:sha1:fd5065584d5f3532d9ffb6e3832e8064f9242c7e
Clean up the codes to move the release handles into fail labels.
v2: squash in Christian's regression fix
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: export reservation_object from dmabuf to ttm (v2)2015-09-23T21:23:34+00:00Christian Königchristian.koenig@amd.com2015-09-03T15:34:59+00:00urn:sha1:72d7668b5ba5180b651e8a07dd6ed62e4e26f207
Adds an extra argument to amdgpu_bo_create, which is only used in amdgpu_prime.c.
Port of radeon commit 831b6966a60fe72d85ae3576056b4e4e0775b112.
v2: fix up kfd.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>