kernel/linux.git/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c, branch linux-4.13.y

drm/amdgpu: add contiguous flag in ucode bo create

2017-06-15T15:50:26+00:00

Under VF environment, the ucode would be settled to the visible VRAM, As it would be pinned to the visible VRAM, it's better to add contiguous flag,otherwise it need to move gpu address during the pin process. This movement is not necessary. Signed-off-by: horchen Reviewed-by: Huang Rui Reviewed-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu: add Raven chip id case for ucode

2017-05-24T21:40:54+00:00

Set the appropriate ucode loading mechanism. Set to direct for now. Signed-off-by: Chunming Zhou Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher

drm/amdgpu: add gpu_info firmware (v3)

2017-05-24T21:39:35+00:00

Add a new gpu info firmware to store gpu specific configuration data. This allows us to store hw constants in a unified place. v2: adjust structure and elements v3: further restructure Reviewed-by: Junwei Zhang Tested-by: Junwei Zhang Signed-off-by: Alex Deucher

drm/amdgpu: Fix firmware UCODE_ID_STORAGE issue (v2)

2017-04-28T21:32:14+00:00

In Tonga's virtualization environment, for firmware UCODE_ID_STORAGE, there is no actual firmware data, but we still need alloc a BO and tell the BO's mc address to HW, or world switch will hang on VFs. v2: fix coding style (Alex) Signed-off-by: Trigger Huang Reviewed-by: Xiangliang Yu Reviewed-by: Monk Liu Acked-by: Huang Rui Signed-off-by: Alex Deucher

drm/amdgpu: rework common ucode handling for vega10

2017-03-30T03:54:40+00:00

Handle ucode differences in vega10. Acked-by: Christian König Signed-off-by: Huang Rui Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu: use new flag to handle different firmware loading method

2017-03-30T03:54:33+00:00

This patch introduces a new flag named "amdgpu_firmware_load_type" to handle different firmware loading method. Since Vega10, there are three ways to load firmware. It would be better to use a flag and a fw_load_type kernel parameter to configure it. Acked-by: Christian König Signed-off-by: Huang Rui Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu: add a ucode size member into firmware info

2017-03-30T03:53:39+00:00

This will be used for newer asics. Acked-by: Christian König Signed-off-by: Huang Rui Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu:properly fix some JumpTable issues

2016-10-25T18:38:23+00:00

we found some MEC ucode leads to IB test fail or even ring test fail if Jump Table of it is not start in FW bo with page aligned address, fixed by always make JT address page aligned. we don't need to patch JT2 for MEC2, because for VI, MEC2 is a copy of MEC1, thus when converting fw_type for MEC_JT2 we just return MEC1,hw can use the same JT for both MEC1 & MEC2. above two change fixed some ring/ib test failure issue for some version of MEC ucode. Signed-off-by: Frank Min Signed-off-by: Monk Liu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu:add MEC_STORAGE ucode id for sriov

2016-10-25T18:38:23+00:00

for sriov, SMC need MEC_STORAGE reserved in fw bo. Signed-off-by: Monk Liu Signed-off-by: Frank Min Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu:fw bo should be in VRAM for SRIOV

2016-10-25T18:38:22+00:00

for GTT memory SMC can only access it within PF space, which is not used for SRIOV case, thus for SRIOV case, we let SMC use FB space for ucode bo. Signed-off-by: Frank Min Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher