Linux kernel stable tree (mirror) https://git.radix-linux.su/kernel/linux.git/atom?h=v5.19 2022-03-02T23:40:06+00:00 2022-03-02T23:40:06+00:00 yipechai YiPeng.Chai@amd.com 2022-02-14T08:15:19+00:00 urn:sha1:149d7ba1f8fe515a2a36ff95fa659720e72fe4ed Remove redundant calls of amdgpu_ras_block_late_fini in sdma ras block. Signed-off-by: yipechai <YiPeng.Chai@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2022-03-02T23:40:05+00:00 yipechai YiPeng.Chai@amd.com 2022-02-17T06:52:20+00:00 urn:sha1:01d468d9a420152e4a1270992e69a37ea0c98e04 Modify .ras_fini function pointer parameter so that we can remove redundant intermediate calls in some ras blocks. Signed-off-by: yipechai <YiPeng.Chai@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2022-02-17T20:59:04+00:00 yipechai YiPeng.Chai@amd.com 2022-02-14T06:12:55+00:00 urn:sha1:4e9b1fa5a2757d11a5c40eed2b2b4837dcb2f12e Modify .ras_late_init function pointer parameter so that it can remove redundant intermediate calls in some ras blocks. Signed-off-by: yipechai <YiPeng.Chai@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2022-01-14T22:52:00+00:00 yipechai YiPeng.Chai@amd.com 2022-01-05T07:30:37+00:00 urn:sha1:bdc4292bd3b4337985f716be789b08eef921f7a6 1.Modify sdma block to fit for the unified ras block data and ops. 2.Change amdgpu_sdma_ras_funcs to amdgpu_sdma_ras, and the corresponding variable name remove _funcs suffix. 3.Remove the const flag of sdma ras variable so that sdma ras block can be able to be inserted into amdgpu device ras block link list. 4.Invoke amdgpu_ras_register_ras_block function to register sdma ras block into amdgpu device ras block link list. 5.Remove the redundant code about sdma in amdgpu_ras.c after using the unified ras block. 6.Fill unified ras block .name .block .ras_late_init and .ras_fini for all of sdma versions. If .ras_late_init and .ras_fini had been defined by the selected sdma version, the defined functions will take effect; if not defined, default fill them with amdgpu_sdma_ras_late_init and amdgpu_sdma_ras_fini. v2: squash in warning fix (Alex) Signed-off-by: yipechai <YiPeng.Chai@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: John Clements <john.clements@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2021-03-05T20:12:23+00:00 Feifei Xu Feifei.Xu@amd.com 2021-03-03T10:42:40+00:00 urn:sha1:8f211fe8ac7c4f334ef5b38d32228cc7eb2a1643 Add VM_HOLE/DOORBELL_INVALID_BE/POLL_TIMEOUT/SRBMWRITE interrupt info printing. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2020-04-28T20:20:29+00:00 Aaron Liu aaron.liu@amd.com 2019-10-15T07:37:48+00:00 urn:sha1:be7538ff7488445297d903f5419de8fb99adf85d This patch expands sdma copy_buffer interface with tmz parameter. Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2020-04-09T14:43:14+00:00 Nirmoy Das nirmoy.das@amd.com 2020-04-01T09:46:57+00:00 urn:sha1:1c6d567bdf73a207f51ef2e5745854ba7daa22c7 Generate HW IP's sched_list in amdgpu_ring_init() instead of amdgpu_ctx.c. This makes amdgpu_ctx_init_compute_sched(), ring.has_high_prio and amdgpu_ctx_init_sched() unnecessary. This patch also stores sched_list for all HW IPs in one big array in struct amdgpu_device which makes amdgpu_ctx_init_entity() much more leaner. v2: fix a coding style issue do not use drm hw_ip const to populate amdgpu_ring_type enum v3: remove ctx reference and move sched array and num_sched to a struct use num_scheds to detect uninitialized scheduler list v4: use array_index_nospec for user space controlled variables fix possible checkpatch.pl warnings Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2020-03-05T05:32:32+00:00 Hawking Zhang Hawking.Zhang@amd.com 2020-03-02T03:54:28+00:00 urn:sha1:86153f1be26901598599c190b458dd26dce0fd50 SDMA ras error counters are dirty ones after cold reboot Read operation is needed to reset them to 0 Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2020-01-14T15:18:08+00:00 Hawking Zhang Hawking.Zhang@amd.com 2020-01-08T13:33:49+00:00 urn:sha1:1dd5ead2940903b2cf36f6725f1d6670abd6f14b move ras_late_init and ras_fini to sdma_ras_funcs table Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2020-01-14T15:18:08+00:00 Hawking Zhang Hawking.Zhang@amd.com 2020-01-08T16:45:18+00:00 urn:sha1:93070deb58c964185acace9fcfdc916a6cea6644 query_ras_error_count function will be invoked to query single bit error count detected in sdma ip block Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>