kernel/linux.git/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h, branch v6.6.36Linux kernel stable tree (mirror)https://git.radix-linux.su/kernel/linux.git/atom?h=v6.6.362023-08-09T13:43:45+00:00drm/amdgpu: Clean up errors in amdgpu_ring.h2023-08-09T13:43:45+00:00Ran Sunsunran001@208suo.com2023-08-02T07:28:13+00:00urn:sha1:1b01c010d7e830db8cec9dee7bb919c9fded43a2
Fix the following errors reported by checkpatch:
ERROR: spaces required around that ':' (ctx:VxW)
Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add amdgpu_error_* debugfs file2023-06-15T15:37:54+00:00Christian Königchristian.koenig@amd.com2023-04-19T10:51:41+00:00urn:sha1:b13eb02ba8ba7617d41212121891756da31f1d8b
This allows us to insert some error codes into the bottom of the pipeline
on an engine.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Luben Tuikov <luben.tuikov@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Modify indirect buffer packages for resubmission2023-06-09T16:44:15+00:00Jiadong ZhuJiadong.Zhu@amd.com2023-05-25T08:52:55+00:00urn:sha1:8ff865be93e642d0ad66ca7369f42fbe36dc6a90
When the preempted IB frame resubmitted to cp, we need to modify the frame
data including:
1. set PRE_RESUME 1 in CONTEXT_CONTROL.
2. use meta data(DE and CE) read from CSA in WRITE_DATA.
Add functions to save the location the first time IBs emitted and callback
to patch the package when resubmission happens.
Signed-off-by: Jiadong Zhu <Jiadong.Zhu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add partition ID track in ring2023-06-09T13:59:30+00:00James ZhuJames.Zhu@amd.com2022-08-15T20:45:12+00:00urn:sha1:797a0a142ca7f3b823ae1032983111c055bc50fb
Keep track partition ID in ring.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: increase AMDGPU_MAX_RINGS2023-06-09T13:54:05+00:00Le Male.ma@amd.com2023-03-16T03:08:06+00:00urn:sha1:bb0ed57b4450e46de3651b310dcb4273032c3122
On newer GPUs, the number of kernel rings are increased.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: increase AMDGPU_MAX_HWIP_RINGS2023-06-09T13:51:51+00:00James ZhuJames.Zhu@amd.com2023-01-10T14:01:33+00:00urn:sha1:1bd99ca2695a76f15d7f7862d6ef878588e854dc
[WA] Increase AMDGPU_MAX_HWIP_RINGS to 64 to support more compute
ring resource. Later need redesign with queue/prirority/scheduler
factors to reduce AMDGPU_MAX_HWIP_RINGS.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: increase MAX setting to hold more jpeg instances2023-06-09T13:51:19+00:00James ZhuJames.Zhu@amd.com2022-12-12T17:29:04+00:00urn:sha1:45ed97ad36b744dfc2754c47cfd4423aab6322a2
vcn_v4_0_3 increased jpeg instances,
need increasing MAX resources setting accordlingly.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: adjust some basic elements for multiple AID case2023-06-09T13:43:35+00:00Le Male.ma@amd.com2022-02-23T03:43:01+00:00urn:sha1:386ea27c3b0bcdd5b5be74bdf26022ab931eae7b
add some elements below:
- num_aid
- aid_id for each sdma instance
- num_inst_per_aid for sdma
and extend macro size below:
- SDMA_MAX_INSTANCES to 16
- AMDGPU_MAX_RINGS to 96
- AMDGPU_MAX_HWIP_RINGS to 32
v2: move aid_id from amdgpu_ring to amdgpu_sdma_instance. (Lijo)
Signed-off-by: Le Ma <le.ma@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: track MQD size for gfx and compute2023-04-24T22:36:45+00:00Alex Deucheralexander.deucher@amd.com2023-03-21T17:28:33+00:00urn:sha1:b185c31847856d9fa3008f727a824db163df0801
It varies by generation and we need to know the size
to expose this via debugfs.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add gfx shadow CS IOCTL support2023-04-24T22:16:19+00:00Christian Königchristian.koenig@amd.com2023-03-09T20:40:48+00:00urn:sha1:ac9287055ff16a092416c76a19006764e4c6a978
Add support for submitting the shadow update packet
when submitting an IB. Needed for MCBP on GFX11.
v2: update API for CSA (Alex)
v3: fix ordering; SET_Q_PREEMPTION_MODE most come before COND_EXEC
Add missing check for AMDGPU_CHUNK_ID_CP_GFX_SHADOW in
amdgpu_cs_pass1()
Only initialize shadow on first use
(Alex)
v4: Pass parameters rather than job to new ring callback (Alex)
v5: squash in change to call SET_Q_PREEMPTION_MODE/COND_EXEC
before RELEASE_MEM to complete the UMDs use of the shadow (Alex)
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>