kernel/linux.git/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c, branch v6.19.12Linux kernel stable tree (mirror)https://git.radix-linux.su/kernel/linux.git/atom?h=v6.19.122026-03-04T12:20:47+00:00drm/amdgpu: return when ras table checksum is error2026-03-04T12:20:47+00:00Gangliang Xieganglxie@amd.com2026-02-09T09:32:00+00:00urn:sha1:9319d7d0c729dd9dbe27a2fe76d1977d296b79a2
[ Upstream commit 044f8d3b1fac6ac89c560f61415000e6bdab3a03 ]
end the function flow when ras table checksum is error
Signed-off-by: Gangliang Xie <ganglxie@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Kent Russell <kent.russell@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drm/amdgpu: optimize timeout implemention in ras_eeprom_update_record_num2025-11-12T02:54:14+00:00Tao Zhoutao.zhou1@amd.com2025-11-06T08:26:56+00:00urn:sha1:7fb41ab3c94828ad48e1a6d2237e8a7e682c74b9
The busy status returned by ras_eeprom_update_record_num may not be
an error, increase timeout to exclude false busy status. Also add more
comments to make the code readable.
v2: define a macro for the timeout value.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add RAS bad page threshold handling for PMFW manages eeprom2025-11-12T02:54:14+00:00Tao Zhoutao.zhou1@amd.com2025-09-24T09:52:24+00:00urn:sha1:eed30152746ec1d8b6e8ab31e349f1eb8d8bd666
Check if bad page threshold is reached and take actions accordingly.
v2: remove rma message sent to smu when pmfw manages eeprom.
v3: add null pointer check for con.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: try for more times if RAS bad page number is not updated2025-11-12T02:54:14+00:00Tao Zhoutao.zhou1@amd.com2025-08-27T11:33:02+00:00urn:sha1:334b27bf712b5ddd19908aba318175e4b9bcf839
RAS info update in PMFW is time cost, wait for it.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: get RAS bad page address from MCA address2025-11-12T02:54:14+00:00Tao Zhoutao.zhou1@amd.com2025-08-27T07:48:06+00:00urn:sha1:e84835940e60a7d5263767ee92acc08f9877cb26
Instead of from physical address.
v2: add comment to make the code more readable
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: skip writing eeprom when PMFW manages RAS data2025-11-06T15:02:15+00:00Tao Zhoutao.zhou1@amd.com2025-09-08T12:39:49+00:00urn:sha1:541414065c59db785000d7661d3d07184e104ec2
Only update bad page number in legacy eeprom write path.
v2: add null pointer check for con.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add ras_eeprom_read_idx interface2025-11-06T14:58:35+00:00Tao Zhoutao.zhou1@amd.com2025-07-23T11:04:17+00:00urn:sha1:7f34ddf77d30959fcc24cd279074f7e0d4f732df
PMFW will manage RAS eeprom data by itself, add new interface to read
eeprom data via PMFW, we can read part of records by setting index.
v2: use IPID parse interface.
pa is not used and set it to a fixed value.
v3: optimize the null pointer check for IPID parse interface.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Yang Wang <kevinyang.wang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: initialize max record count after table reset2025-11-06T14:56:22+00:00Gangliang Xieganglxie@amd.com2025-10-31T05:41:36+00:00urn:sha1:1349b31313d5bf840e0ffe780d17acafc4ef81f8
initialize max record count and record offset after table reset
Signed-off-by: Gangliang Xie <ganglxie@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add check function for pmfw eeprom2025-11-06T14:56:15+00:00Gangliang Xieganglxie@amd.com2025-09-04T10:09:40+00:00urn:sha1:cd5b28a040edc46dd251cd681d6f414953a988c6
add check function for pmfw eeprom
Signed-off-by: Gangliang Xie <ganglxie@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add initialization function for pmfw eeprom2025-11-06T14:56:04+00:00Gangliang Xieganglxie@amd.com2025-09-04T10:07:40+00:00urn:sha1:19c815d516745083994009518f63092a89f6edc1
add initialization function for pmfw eeprom
Signed-off-by: Gangliang Xie <ganglxie@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>