kernel/linux.git/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h, branch v6.18.21Linux kernel stable tree (mirror)https://git.radix-linux.su/kernel/linux.git/atom?h=v6.18.212025-08-27T17:57:47+00:00drm/amdgpu: Correct the loss of aca bank reg info2025-08-27T17:57:47+00:00Ce Suncesun102@amd.com2025-08-20T09:18:57+00:00urn:sha1:d8442bcad0764c5613e9f8b2356f3e0a48327e20
By polling, poll ACA bank count to ensure that valid
ACA bank reg info can be obtained
v2: add corresponding delay before send msg to SMU to query mca bank info
(Stanley)
v3: the loop cannot exit. (Thomas)
v4: remove amdgpu_aca_clear_bank_count. (Kevin)
v5: continuously inject ce. If a creation interruption
occurs at this time, bank reg info will be lost. (Thomas)
v5: each cycle is delayed by 100ms. (Tao)
Signed-off-by: Ce Sun <cesun102@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Add a mutex lock to protect poison injection2025-08-27T17:57:47+00:00Ce Suncesun102@amd.com2025-08-19T06:47:05+00:00urn:sha1:0989b764f43d4de2c6665c15165c251d9cfde9c0
When poison is triggered multiple times, competition will occur.
Add a mutex lock to protect poison injection
Signed-off-by: Ce Sun <cesun102@amd.com>
Reviewed-by: Yang Wang <kevinyang.wang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Avoid rma causes GPU duplicate reset2025-08-04T18:27:47+00:00Ce Suncesun102@amd.com2025-07-27T04:06:55+00:00urn:sha1:21c0ffa612c98bcc6dab5bd9d977a18d565ee28e
Try to ensure poison creation handle is completed in time
to set device rma value.
Signed-off-by: Ce Sun <cesun102@amd.com>
Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: support ras critical address check2025-07-28T20:40:06+00:00YiPeng ChaiYiPeng.Chai@amd.com2025-07-24T07:34:29+00:00urn:sha1:f3486918979030f8982e1af901561dbd6e2cd1bc
Support ras critical address check.
Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: adjust the update of RAS bad page number2025-07-28T20:40:06+00:00Tao Zhoutao.zhou1@amd.com2025-07-04T09:12:24+00:00urn:sha1:d45c5e6845a76169ef3d6076f0f04487e5776905
One eeprom record may not map to unit number of bad pages, the accurate
bad page number is gotten after bad page address check.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add command to check address validity2025-07-28T20:40:06+00:00YiPeng ChaiYiPeng.Chai@amd.com2025-07-16T03:16:20+00:00urn:sha1:a813437c33842c4e28a0656a9d8f20c3a8d35d6d
Add command to check address validity and remove
unused command codes.
v2:
The command interface adds new parameters to support
multiple check address strategies.
Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Update ta ras block2025-03-26T21:44:34+00:00Stanley.YangStanley.Yang@amd.com2025-03-25T03:10:43+00:00urn:sha1:cc11dffc14bd2322d92a896a639cc42145401515
Update ta ra block to keep sync with RAS TA.
Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Report generic instead of unknown boot time errors2025-02-27T21:50:03+00:00Xiang Liuxiang.liu@amd.com2025-02-26T06:27:27+00:00urn:sha1:d4bd7a50ca7c6199438cf19063464b4d6327a6c1
Change the DMESG reporting of unknown errors to "Boot Controller
Generic Error" to align with the RAS SPEC and provide more clarity
to customers.
Signed-off-by: Xiang Liu <xiang.liu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Update usage for bad page threshold2025-02-13T02:02:59+00:00Hawking ZhangHawking.Zhang@amd.com2025-01-22T11:34:33+00:00urn:sha1:16b85a0942c0b0f1611bcaa42cc98f020e34b1cf
The driver's behavior varies based on
the configuration of amdgpu_bad_page_threshold setting
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: parse legacy RAS bad page mixed with new data in various NPS modes2024-12-10T15:26:48+00:00Tao Zhoutao.zhou1@amd.com2024-10-31T07:48:10+00:00urn:sha1:a8d133e625ceb147a173b6cafc862a9bd4312894
All legacy RAS bad pages are generated in NPS1 mode, but new bad page
can be generated in any NPS mode, so we can't use retired_page stored
on eeprom directly in non-nps1 mode even for legacy data. We need to
take different actions for different data, new data can be identified
from old data by UMC_CHANNEL_IDX_V2 flag.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>